From 405c0287c80c34b0e9dfb9d9326b86d12433b4c4 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Thu, 2 May 2024 21:03:05 -0600 Subject: platform/wavelet3d: implement shader cores This commit contains over a month of intermittent work (I don't have enough free time to do this the right way) --- platform/wavelet3d/gfx_shader_schedif.rdl | 74 +++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 platform/wavelet3d/gfx_shader_schedif.rdl (limited to 'platform/wavelet3d/gfx_shader_schedif.rdl') diff --git a/platform/wavelet3d/gfx_shader_schedif.rdl b/platform/wavelet3d/gfx_shader_schedif.rdl new file mode 100644 index 0000000..2ab31ac --- /dev/null +++ b/platform/wavelet3d/gfx_shader_schedif.rdl @@ -0,0 +1,74 @@ +addrmap gfx_shader_schedif { + name = "Scheduler<->core interface"; + + default hw = r; + default sw = w; + default regwidth = 32; + + reg { + name = "Shader core control register"; + + field { + desc = "Set this field to flush the instruction cache"; + + singlepulse; + } IFLUSH[0:0] = 0; + } CORE @ 0x0; + + reg { + name = "Wavefront setup control register"; + + default hw = w; + default sw = r; + default precedence = hw; + + field { + desc = "Wavefront group number"; + + hw = r; + sw = rw; + } GROUP[5:0]; + + field { + desc = "Destination SGPR number"; + + hw = r; + sw = rw; + } XGPR[11:8]; + + field { + desc = "PC table update done, group submitted"; + + rclr; + hwset; + } SUBMIT_DONE[16:16] = 0; + + field { + desc = "General-purpose register update done"; + + rclr; + hwset; + } GPR_DONE[17:17] = 0; + } SETUP_CTRL @ 0x4; + + reg { + name = "SGPR/VGPR write register"; + + field { + desc = "Value to write"; + + swmod; + } VALUE[31:0]; + } SETUP_GPR @ 0x8; + + reg { + name = "Group submit register"; + + field { + desc = "Initial group program counter, submits group on write"; + + swmod; + } PC[31:2]; + } SETUP_SUBMIT @ 0xc; +}; + -- cgit v1.2.3