From ce81149da7c61523963a63ddd9bfec2f793d7fe8 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jos=C3=A9=20Juli=C3=A1n?= <jjulian.341@gmail.com>
Date: Thu, 3 Nov 2022 12:06:13 -0600
Subject: platform: add vga controller to platform

---
 platform.qsys | 41 ++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 40 insertions(+), 1 deletion(-)

(limited to 'platform.qsys')

diff --git a/platform.qsys b/platform.qsys
index 7d5bfe2..65f39d2 100644
--- a/platform.qsys
+++ b/platform.qsys
@@ -105,6 +105,14 @@
          type = "int";
       }
    }
+   element vga_controller_0
+   {
+      datum _sortIndex
+      {
+         value = "9";
+         type = "int";
+      }
+   }
    element vram
    {
       datum _sortIndex
@@ -153,6 +161,11 @@
    type="clock"
    dir="start" />
  <interface name="reset" internal="clk_0.clk_in_reset" type="reset" dir="end" />
+ <interface
+   name="vga_controller_0_dac"
+   internal="vga_controller_0.dac"
+   type="conduit"
+   dir="end" />
  <interface name="vram_wire" internal="vram.wire" type="conduit" dir="end" />
  <module
    name="address_span_extender_0"
@@ -727,7 +740,9 @@
    name="master_0"
    kind="conspiracion_bus_master"
    version="1.0"
-   enabled="1" />
+   enabled="1">
+  <parameter name="AUTO_IRQ_INTERRUPTS_USED" value="0" />
+ </module>
  <module name="pio_0" kind="altera_avalon_pio" version="20.1" enabled="1">
   <parameter name="bitClearingEdgeCapReg" value="false" />
   <parameter name="bitModifyingOutReg" value="true" />
@@ -957,6 +972,11 @@
   <parameter name="timeoutPulseOutput" value="false" />
   <parameter name="watchdogPulse" value="2" />
  </module>
+ <module
+   name="vga_controller_0"
+   kind="vga_controller"
+   version="1.0"
+   enabled="1" />
  <module
    name="vram"
    kind="altera_avalon_new_sdram_controller"
@@ -1022,6 +1042,15 @@
   <parameter name="baseAddress" value="0x30010000" />
   <parameter name="defaultConnection" value="false" />
  </connection>
+ <connection
+   kind="avalon"
+   version="20.1"
+   start="vga_controller_0.avalon_master"
+   end="vram.s1">
+  <parameter name="arbitrationPriority" value="1" />
+  <parameter name="baseAddress" value="0x0000" />
+  <parameter name="defaultConnection" value="false" />
+ </connection>
  <connection
    kind="avalon"
    version="20.1"
@@ -1064,6 +1093,11 @@
    start="pll_0.outclk1"
    end="master_0.clock" />
  <connection kind="clock" version="20.1" start="pll_0.outclk2" end="vram.clk" />
+ <connection
+   kind="clock"
+   version="20.1"
+   start="pll_0.outclk2"
+   end="vga_controller_0.clock_sink" />
  <connection
    kind="reset"
    version="20.1"
@@ -1087,6 +1121,11 @@
    version="20.1"
    start="clk_0.clk_reset"
    end="master_0.reset_sink" />
+ <connection
+   kind="reset"
+   version="20.1"
+   start="clk_0.clk_reset"
+   end="vga_controller_0.reset_sink" />
  <interconnectRequirement for="$system" name="qsys_mm.clockCrossingAdapter" value="HANDSHAKE" />
  <interconnectRequirement for="$system" name="qsys_mm.enableEccProtection" value="FALSE" />
  <interconnectRequirement for="$system" name="qsys_mm.insertDefaultSlave" value="FALSE" />
-- 
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