From a4b94d40e61e634aa8e970af3911a7671e7d8d50 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sat, 27 Apr 2024 11:30:47 -0600 Subject: mk: implement peakrdl support --- mk/builtin/peakrdl_intfs/axi4lite_intf.sv | 80 +++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 mk/builtin/peakrdl_intfs/axi4lite_intf.sv (limited to 'mk/builtin/peakrdl_intfs/axi4lite_intf.sv') diff --git a/mk/builtin/peakrdl_intfs/axi4lite_intf.sv b/mk/builtin/peakrdl_intfs/axi4lite_intf.sv new file mode 100644 index 0000000..b0a232d --- /dev/null +++ b/mk/builtin/peakrdl_intfs/axi4lite_intf.sv @@ -0,0 +1,80 @@ +interface axi4lite_intf #( + parameter DATA_WIDTH = 32, + parameter ADDR_WIDTH = 32 +); + logic AWREADY; + logic AWVALID; + logic [ADDR_WIDTH-1:0] AWADDR; + logic [2:0] AWPROT; + + logic WREADY; + logic WVALID; + logic [DATA_WIDTH-1:0] WDATA; + logic [DATA_WIDTH/8-1:0] WSTRB; + + logic BREADY; + logic BVALID; + logic [1:0] BRESP; + + logic ARREADY; + logic ARVALID; + logic [ADDR_WIDTH-1:0] ARADDR; + logic [2:0] ARPROT; + + logic RREADY; + logic RVALID; + logic [DATA_WIDTH-1:0] RDATA; + logic [1:0] RRESP; + + modport master ( + input AWREADY, + output AWVALID, + output AWADDR, + output AWPROT, + + input WREADY, + output WVALID, + output WDATA, + output WSTRB, + + output BREADY, + input BVALID, + input BRESP, + + input ARREADY, + output ARVALID, + output ARADDR, + output ARPROT, + + output RREADY, + input RVALID, + input RDATA, + input RRESP + ); + + modport slave ( + output AWREADY, + input AWVALID, + input AWADDR, + input AWPROT, + + output WREADY, + input WVALID, + input WDATA, + input WSTRB, + + input BREADY, + output BVALID, + output BRESP, + + output ARREADY, + input ARVALID, + input ARADDR, + input ARPROT, + + input RREADY, + output RVALID, + output RDATA, + output RRESP + ); +endinterface -- cgit v1.2.3