From 986863efed48dfba23907400beb7e5f025b75b50 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Thu, 26 Oct 2023 01:33:00 -0600 Subject: rtl/gfx: synchronize clock with SDRAM --- ip/ip_fp_mul_sim/cadence/ncsim_setup.sh | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ip/ip_fp_mul_sim/cadence') diff --git a/ip/ip_fp_mul_sim/cadence/ncsim_setup.sh b/ip/ip_fp_mul_sim/cadence/ncsim_setup.sh index e4268b4..dd6a06c 100755 --- a/ip/ip_fp_mul_sim/cadence/ncsim_setup.sh +++ b/ip/ip_fp_mul_sim/cadence/ncsim_setup.sh @@ -12,7 +12,7 @@ # or its authorized distributors. Please refer to the applicable # agreement for further details. -# ACDS 20.1 720 linux 2023.10.21.20:27:56 +# ACDS 20.1 720 linux 2023.10.26.05:48:33 # ---------------------------------------- # ncsim - auto-generated simulation script @@ -106,7 +106,7 @@ # within the Quartus project, and generate a unified # script which supports all the Altera IP within the design. # ---------------------------------------- -# ACDS 20.1 720 linux 2023.10.21.20:27:56 +# ACDS 20.1 720 linux 2023.10.26.05:48:33 # ---------------------------------------- # initialize variables TOP_LEVEL_NAME="ip_fp_mul" -- cgit v1.2.3