From c1c1f1e823099c82d02e94827a64d7a0b223048e Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 22 Oct 2023 00:16:40 -0600 Subject: rtl/gfx: reimplement multiplier as a much smaller mat-vec pipeline --- gfx_hw.tcl | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'gfx_hw.tcl') diff --git a/gfx_hw.tcl b/gfx_hw.tcl index f337d95..cff04b0 100644 --- a/gfx_hw.tcl +++ b/gfx_hw.tcl @@ -46,7 +46,8 @@ add_fileset_file gfx_defs.sv SYSTEM_VERILOG PATH rtl/gfx/gfx_defs.sv add_fileset_file horizontal_fold.sv SYSTEM_VERILOG PATH rtl/gfx/horizontal_fold.sv add_fileset_file mat_mat_mul.sv SYSTEM_VERILOG PATH rtl/gfx/mat_mat_mul.sv add_fileset_file mat_vec_mul.sv SYSTEM_VERILOG PATH rtl/gfx/mat_vec_mul.sv -add_fileset_file pipelined_flow.sv SYSTEM_VERILOG PATH rtl/gfx/pipelined_flow.sv +add_fileset_file pipeline_flow.sv SYSTEM_VERILOG PATH rtl/gfx/pipeline_flow.sv +add_fileset_file fold_flow.sv SYSTEM_VERILOG PATH rtl/gfx/fold_flow.sv add_fileset_file vec_dot.sv SYSTEM_VERILOG PATH rtl/gfx/vec_dot.sv -- cgit v1.2.3