From 1f94f0eb7e214bff29468bf9c39cb99520e290f2 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Tue, 13 Dec 2022 14:59:33 -0600 Subject: Add cp15 cyclecnt clock source --- conspiracion.qsf | 1 + 1 file changed, 1 insertion(+) (limited to 'conspiracion.qsf') diff --git a/conspiracion.qsf b/conspiracion.qsf index ccbc9a9..939e1b5 100644 --- a/conspiracion.qsf +++ b/conspiracion.qsf @@ -227,6 +227,7 @@ set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cache.sv set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cache_lockdown.sv set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cp15.sv set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cpuid.sv +set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/cyclecnt.sv set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/domain.sv set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/far.sv set_global_assignment -name SYSTEMVERILOG_FILE rtl/core/cp15/fsr.sv -- cgit v1.2.3