From f4a3bb7f9656f45b7c0d9b3ed8e8b09e9bd14d37 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jos=C3=A9=20Juli=C3=A1n?= Date: Tue, 1 Nov 2022 04:37:33 -0600 Subject: Se modifica el platform design --- platform.qsys | 396 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 393 insertions(+), 3 deletions(-) diff --git a/platform.qsys b/platform.qsys index 7b43e8b..1312ddd 100644 --- a/platform.qsys +++ b/platform.qsys @@ -33,6 +33,14 @@ type = "int"; } } + element jtag_uart_0 + { + datum _sortIndex + { + value = "6"; + type = "int"; + } + } element master_0 { datum _sortIndex @@ -41,6 +49,14 @@ type = "int"; } } + element pio_0 + { + datum _sortIndex + { + value = "8"; + type = "int"; + } + } element platform { datum _originalDeviceFamily @@ -73,6 +89,30 @@ type = "String"; } } + element pll_0 + { + datum _sortIndex + { + value = "4"; + type = "int"; + } + } + element timer_0 + { + datum _sortIndex + { + value = "7"; + type = "int"; + } + } + element vram + { + datum _sortIndex + { + value = "5"; + type = "int"; + } + } } ]]> @@ -102,7 +142,18 @@ type="conduit" dir="end" /> + + + + + + + + + + + + NO_INTERACTIVE_WINDOWS + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Create an adjpllin signal to connect with an upstream PLL + + + + + + + + + + + + + + + + + + + + + + + + Automatic Switchover + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + single_Micron_MT48LC4M32B2_7_chip + + + + + + + + + + + + + + + + + + + + + + + + + + + + - + + + + + + + + + + +