From c08af15960a7c313948b8b511297d75c09f50b85 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Wed, 4 Oct 2023 19:13:01 -0600 Subject: sim: implement fst traces --- .gitignore | 2 ++ Makefile | 23 ++++++++++------------- flake.nix | 5 +++-- sim/sim.py | 11 ++++++++--- tb/top/conspiracion.cpp | 28 +++++++++++++++++----------- 5 files changed, 40 insertions(+), 29 deletions(-) diff --git a/.gitignore b/.gitignore index 022599d..f6bb125 100644 --- a/.gitignore +++ b/.gitignore @@ -34,6 +34,7 @@ __pycache__ hps_sdram_p0_summary.csv vcd/ +trace/ cov/ obj/ build/ @@ -44,6 +45,7 @@ platform.sopcinfo hps_isw_handoff/ *~ *.vcd +*.fst qmegawiz_errors_log.txt cr_ie_info.json u-boot diff --git a/Makefile b/Makefile index 15b5ed0..e5d4e81 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,5 @@ TOP := conspiracion -VCD_DIR := vcd +FST_DIR := trace OBJ_DIR := obj COV_DIR := cov RTL_DIR := rtl @@ -37,7 +37,7 @@ CC_CPU := -mcpu=arm810 VFLAGS ?= \ --x-assign $(X_MODE) --x-initial $(X_MODE) \ $(if $(ENABLE_THREADS),--threads $(shell nproc)) \ - $(if $(DISABLE_TRACE),,--trace) \ + $(if $(DISABLE_TRACE),,--trace --trace-fst) \ $(if $(DISABLE_COV),,--coverage) RTL_FILES = $(shell find $(RTL_DIR)/ ! -path '$(RTL_DIR)/top/*' -type f -name '*.sv') @@ -46,10 +46,12 @@ TB_FILES = $(shell find $(TB_DIR)/ ! -path '$(TB_DIR)/top/*' -type f -name '*. SIMS := $(patsubst $(TB_SIM_DIR)/%.py,%,$(wildcard $(TB_SIM_DIR)/*.py)) +GIT_REV := $(shell if [ -d .git ]; then echo -$$(git rev-parse --short HEAD); fi) + all: sim clean: - rm -rf $(DIST_DIR) $(OBJ_DIR) $(VCD_DIR) $(COV_DIR) + rm -rf $(DIST_DIR) $(OBJ_DIR) $(FST_DIR) $(COV_DIR) dist: $(if $(DISABLE_COV),,cov) @mkdir -p $(DIST_DIR) @@ -57,26 +59,21 @@ dist: $(if $(DISABLE_COV),,cov) @git ls-files | xargs cp --parents -rvt $(DIST_OBJ_DIR)/src @mv -vt $(DIST_OBJ_DIR) $(DIST_OBJ_DIR)/src/README.md @$(if $(DISABLE_COV),,cp -rvt $(DIST_OBJ_DIR)/results $(COV_DIR)) + @$(if $(DISABLE_TRACE),,cp -rvt $(DIST_OBJ_DIR)/results $(FST_DIR)) @[ -f $(RBF_OUT_DIR)/$(TOP).rbf ] \ && cp -vt $(DIST_OBJ_DIR)/bitstream $(RBF_OUT_DIR)/$(TOP).rbf \ || echo "Warning: missing bitstream at $(RBF_OUT_DIR)/$(TOP).rbf" >&2 cd $(DIST_OBJ_DIR) && zip -qr \ - $(shell pwd)/$(DIST_DIR)/$(TOP)-$(shell git rev-parse --short HEAD)-$(shell date +'%Y%m%d-%H%M%S').zip * - -trace: trace/$(TOP) - -trace/%: exe/% $(VCD_DIR)/% - cd $(VCD_DIR)/$* && ../../$(OBJ_DIR)/$*/V$* - -$(VCD_DIR)/%: - mkdir -p $@ + $(shell pwd)/$(DIST_DIR)/$(TOP)$(GIT_REV)-$(shell date +'%Y%m%d-%H%M%S').zip * sim: $(addprefix sim/,$(SIMS)) sim/%: $(SIM_DIR)/sim.py $(TB_SIM_DIR)/%.py exe/$(TOP) $(SIM_OBJ_DIR)/%.bin + @$(if $(DISABLE_TRACE),,mkdir -p $(FST_DIR)/$*) @$< $(TB_SIM_DIR)/$*.py $(OBJ_DIR)/$(TOP)/V$(TOP) \ $(SIM_OBJ_DIR)/$*.bin \ - $(if $(DISABLE_COV),,$(SIM_OBJ_DIR)/$*.cov) + $(if $(DISABLE_COV),,--coverage $(SIM_OBJ_DIR)/$*.cov) \ + $(if $(DISABLE_TRACE),,--trace $(FST_DIR)/$*/trace$(GIT_REV).fst) vmlaunch: $(SIM_DIR)/sim.py $(SIM_DIR)/gdbstub.py exe/$(TOP) @ENABLE_VIDEO=1 $< $(SIM_DIR)/gdbstub.py $(OBJ_DIR)/$(TOP)/V$(TOP) build/u-boot.bin diff --git a/flake.nix b/flake.nix index 3fcb236..2d6e5db 100644 --- a/flake.nix +++ b/flake.nix @@ -121,6 +121,7 @@ ncurses openssl SDL2 + zlib ]; nativeBuildInputs = [ @@ -143,8 +144,8 @@ shellHook = '' export CROSS_COMPILE=arm-unknown-linux-gnueabi- export MAKEFLAGS="AR=gcc-ar" - export CXXFLAGS="$(pkg-config --cflags sdl2 ncursesw)" - export LDFLAGS="$(pkg-config --libs sdl2 ncursesw)" + export CXXFLAGS="$(pkg-config --cflags ncursesw sdl2 zlib)" + export LDFLAGS="$(pkg-config --libs ncursesw sdl2 zlib)" # export LOCALE_ARCHIVE="${glibcLocales}/lib/locale/locale-archive" diff --git a/sim/sim.py b/sim/sim.py index 4b3871e..6ad3d23 100755 --- a/sim/sim.py +++ b/sim/sim.py @@ -6,13 +6,15 @@ parser = argparse.ArgumentParser() parser.add_argument('module_path') parser.add_argument('verilated') parser.add_argument('image') -parser.add_argument('coverage_out', nargs='?') +parser.add_argument('--coverage') +parser.add_argument('--trace') args = parser.parse_args() module_path = args.module_path verilated = args.verilated image = args.image -coverage_out = args.coverage_out +coverage_out = args.coverage +trace = args.trace test_name = pathlib.Path(module_path).stem module = None @@ -409,7 +411,10 @@ init_regs = None exec_args.append(image) if coverage_out: - exec_args.append(coverage_out) + exec_args.extend(['--coverage', coverage_out]) + +if trace: + exec_args.extend(['--trace', trace]) exec_args.append(f'+verilator+seed+{seed}') if not os.getenv('SIM_PULLX', 0): diff --git a/tb/top/conspiracion.cpp b/tb/top/conspiracion.cpp index 00a672e..a0de8f4 100644 --- a/tb/top/conspiracion.cpp +++ b/tb/top/conspiracion.cpp @@ -11,7 +11,10 @@ #include #include -#include + +#if VM_TRACE +#include +#endif #include "Vconspiracion.h" #include "Vconspiracion_arm810.h" @@ -258,14 +261,19 @@ int main(int argc, char **argv) parser, "addr,filename", "Load a file", {"load"} ); - args::Positional image + args::ValueFlag coverage_out ( - parser, "image", "Executable image to run", args::Options::Required + parser, "coverage", "Coverage output file", {"coverage"} + ); + + args::ValueFlag trace_out + ( + parser, "trace", "trace output file", {"trace"} ); - args::Positional coverage_out + args::Positional image ( - parser, "coverage-out", "Coverage output file" + parser, "image", "Executable image to run", args::Options::Required ); try @@ -302,13 +310,13 @@ int main(int argc, char **argv) Vconspiracion top; #if VM_TRACE - VerilatedVcdC trace; + VerilatedFstC trace; - bool enable_trace = std::getenv("TRACE"); + auto enable_trace = static_cast(trace_out); if (enable_trace) { Verilated::traceEverOn(true); top.trace(&trace, 0); - trace.open("trace.vcd"); + trace.open(trace_out->c_str()); } #else bool enable_trace = false; @@ -448,10 +456,8 @@ int main(int argc, char **argv) } #if VM_TRACE - if(enable_trace) - { + if (enable_trace) trace.dump(time++); - } #endif }; -- cgit v1.2.3