From bf82f69cbf7fa0900263236057174c421a28045c Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Wed, 9 Nov 2022 09:54:34 -0600 Subject: Improve sdram sim test --- tb/sim/sdram.S | 4 ++-- tb/sim/sdram.py | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tb/sim/sdram.S b/tb/sim/sdram.S index 1efb58e..e0d2bf8 100644 --- a/tb/sim/sdram.S +++ b/tb/sim/sdram.S @@ -1,9 +1,9 @@ .global reset reset: - ldr r0, =0x1000 + ldr r0, =0x1004 ldr r1, =0x2000 - mov r2, #0 + mov r2, #42 .loop: str r2, [r0], #4 diff --git a/tb/sim/sdram.py b/tb/sim/sdram.py index fbc2c97..b64c153 100644 --- a/tb/sim/sdram.py +++ b/tb/sim/sdram.py @@ -1,8 +1,8 @@ -START = 0x0000_1000 +START = 0x0000_1004 END = 0x0000_2000 cycles = 30000 mem_dumps = [range(START, END)] def final(): - assert_mem(START, list(range(0, (END - START) >> 2))) + assert_mem(START, list(range(42, 42 + (END - START) >> 2))) -- cgit v1.2.3