From 638b75fb4c8fdc3c9d3a208f6bd9976841bc0928 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sun, 5 May 2024 18:45:11 -0600 Subject: rtl/if_common: initial commit, moved out of gfx --- platform/wavelet3d/w3d_top.sv | 6 +- rtl/gfx/gfx_axib.sv | 81 ------------------------ rtl/gfx/gfx_axil.sv | 61 ------------------ rtl/gfx/gfx_axil2regblock.sv | 30 --------- rtl/gfx/gfx_beats.sv | 29 --------- rtl/gfx/gfx_bootrom.sv | 6 +- rtl/gfx/gfx_fifo.sv | 8 +-- rtl/gfx/gfx_pkts.sv | 29 --------- rtl/gfx/gfx_raster.sv | 127 ++++++++++++++++++-------------------- rtl/gfx/gfx_sched.sv | 10 +-- rtl/gfx/gfx_shader.sv | 10 +-- rtl/gfx/gfx_shader_back.sv | 12 ++-- rtl/gfx/gfx_shader_front.sv | 8 +-- rtl/gfx/gfx_shader_group.sv | 2 +- rtl/gfx/gfx_shader_mem.sv | 2 +- rtl/gfx/gfx_shader_sfu.sv | 2 +- rtl/gfx/gfx_shake.sv | 24 ------- rtl/gfx/gfx_sim_debug.sv | 6 +- rtl/gfx/gfx_xbar_sched.sv | 12 ++-- rtl/gfx/mod.mk | 2 +- rtl/if_common/if_axib.sv | 80 ++++++++++++++++++++++++ rtl/if_common/if_axil.sv | 61 ++++++++++++++++++ rtl/if_common/if_axil2regblock.sv | 30 +++++++++ rtl/if_common/if_beats.sv | 29 +++++++++ rtl/if_common/if_pkts.sv | 27 ++++++++ rtl/if_common/if_shake.sv | 24 +++++++ rtl/if_common/mod.mk | 3 + rtl/mod.mk | 2 +- 28 files changed, 359 insertions(+), 364 deletions(-) delete mode 100644 rtl/gfx/gfx_axib.sv delete mode 100644 rtl/gfx/gfx_axil.sv delete mode 100644 rtl/gfx/gfx_axil2regblock.sv delete mode 100644 rtl/gfx/gfx_beats.sv delete mode 100644 rtl/gfx/gfx_pkts.sv delete mode 100644 rtl/gfx/gfx_shake.sv create mode 100644 rtl/if_common/if_axib.sv create mode 100644 rtl/if_common/if_axil.sv create mode 100644 rtl/if_common/if_axil2regblock.sv create mode 100644 rtl/if_common/if_beats.sv create mode 100644 rtl/if_common/if_pkts.sv create mode 100644 rtl/if_common/if_shake.sv create mode 100644 rtl/if_common/mod.mk diff --git a/platform/wavelet3d/w3d_top.sv b/platform/wavelet3d/w3d_top.sv index 34ecb52..a125107 100644 --- a/platform/wavelet3d/w3d_top.sv +++ b/platform/wavelet3d/w3d_top.sv @@ -44,10 +44,10 @@ import gfx::*; logic srst_n; gfx_wb fpint_wb(); - gfx_axib insn_mem(); - gfx_pkts geometry(), coverage(); + if_axib insn_mem(); + if_axil bootrom_axi(), debug_axi(), sched_axi(), shader_0_axi(); + if_pkts geometry(), coverage(); gfx_regfile_io fpint_io(); - gfx_axil bootrom_axi(), debug_axi(), sched_axi(), shader_0_axi(); assign q = fpint_wb.rx.lanes; assign out_valid = fpint_wb.rx.valid; diff --git a/rtl/gfx/gfx_axib.sv b/rtl/gfx/gfx_axib.sv deleted file mode 100644 index 7b3cbdc..0000000 --- a/rtl/gfx/gfx_axib.sv +++ /dev/null @@ -1,81 +0,0 @@ -// AXI4 con burst -interface gfx_axib; - - import gfx::word; - - logic awvalid, - awready; - logic[7:0] awlen; - logic[1:0] awburst; - word awaddr; - - logic wlast; - logic wvalid; - logic wready; - word wdata; - - logic bvalid; - logic bready; - - logic arvalid, - arready; - logic[7:0] arlen; - logic[1:0] arburst; - word araddr; - - logic rlast; - logic rvalid; - logic rready; - word rdata; - - modport m - ( - input awready, - wready, - bvalid, - arready, - rlast, - rvalid, - rdata, - - output awlen, - awburst, - awvalid, - awaddr, - wlast, - wvalid, - wdata, - bready, - arlen, - arburst, - arvalid, - araddr, - rready - ); - - modport s - ( - input awlen, - awburst, - awvalid, - awaddr, - wlast, - wvalid, - wdata, - bready, - arlen, - arburst, - arvalid, - araddr, - rready, - - output awready, - wready, - bvalid, - arready, - rlast, - rvalid, - rdata - ); - -endinterface diff --git a/rtl/gfx/gfx_axil.sv b/rtl/gfx/gfx_axil.sv deleted file mode 100644 index c254e26..0000000 --- a/rtl/gfx/gfx_axil.sv +++ /dev/null @@ -1,61 +0,0 @@ -// AXI4-Lite, sin wstrb ni axprot -interface gfx_axil; - import gfx::*; - - logic awvalid; - logic awready; - word awaddr; - - logic wvalid; - logic wready; - word wdata; - - logic bvalid; - logic bready; - - logic arvalid; - logic arready; - word araddr; - - logic rvalid; - logic rready; - word rdata; - - modport m - ( - input awready, - wready, - bvalid, - arready, - rvalid, - rdata, - - output awvalid, - awaddr, - wvalid, - wdata, - bready, - arvalid, - araddr, - rready - ); - - modport s - ( - input awvalid, - awaddr, - wvalid, - wdata, - bready, - arvalid, - araddr, - rready, - - output awready, - wready, - bvalid, - arready, - rvalid, - rdata - ); -endinterface diff --git a/rtl/gfx/gfx_axil2regblock.sv b/rtl/gfx/gfx_axil2regblock.sv deleted file mode 100644 index 2449b05..0000000 --- a/rtl/gfx/gfx_axil2regblock.sv +++ /dev/null @@ -1,30 +0,0 @@ -module gfx_axil2regblock -( - gfx_axil.s axis, - axi4lite_intf.master axim -); - - assign axis.rdata = axim.RDATA; - assign axis.rvalid = axim.RVALID; - assign axis.bvalid = axim.BVALID; - assign axis.wready = axim.WREADY; - assign axis.arready = axim.ARREADY; - assign axis.awready = axim.AWREADY; - - assign axim.AWVALID = axis.awvalid; - assign axim.AWADDR = axis.awaddr[$bits(axim.AWADDR) - 1:0]; - assign axim.AWPROT = '0; - - assign axim.WVALID = axis.wvalid; - assign axim.WDATA = axis.wdata; - assign axim.WSTRB = '1; - - assign axim.BREADY = axis.bready; - - assign axim.ARVALID = axis.arvalid; - assign axim.ARADDR = axis.araddr[$bits(axim.ARADDR) - 1:0]; - assign axim.ARPROT = '0; - - assign axim.RREADY = axis.rready; - -endmodule diff --git a/rtl/gfx/gfx_beats.sv b/rtl/gfx/gfx_beats.sv deleted file mode 100644 index fcbb091..0000000 --- a/rtl/gfx/gfx_beats.sv +++ /dev/null @@ -1,29 +0,0 @@ -interface gfx_beats -#(int WIDTH = $bits(gfx::word)); - - logic[WIDTH - 1:0] data; - logic ready; - logic valid; - - modport tx - ( - input ready, - output data, - valid - ); - - modport rx - ( - input data, - valid, - output ready - ); - - modport peek - ( - input data, - ready, - valid - ); - -endinterface diff --git a/rtl/gfx/gfx_bootrom.sv b/rtl/gfx/gfx_bootrom.sv index 2c4581e..a8f3b74 100644 --- a/rtl/gfx/gfx_bootrom.sv +++ b/rtl/gfx/gfx_bootrom.sv @@ -1,10 +1,10 @@ module gfx_bootrom import gfx::*; ( - input logic clk, - rst_n, + input logic clk, + rst_n, - gfx_axil.s axis + if_axil.s axis ); localparam ROM_WORDS_LOG = 8; diff --git a/rtl/gfx/gfx_fifo.sv b/rtl/gfx/gfx_fifo.sv index 7174e4d..ae8b6f7 100644 --- a/rtl/gfx/gfx_fifo.sv +++ b/rtl/gfx/gfx_fifo.sv @@ -2,11 +2,11 @@ module gfx_fifo #(int WIDTH = 0, int DEPTH = 0) ( - input logic clk, - rst_n, + input logic clk, + rst_n, - gfx_beats.rx in, - gfx_beats.tx out + if_beats.rx in, + if_beats.tx out ); logic do_read, do_write, full_if_eq, in_stall, out_stall, diff --git a/rtl/gfx/gfx_pkts.sv b/rtl/gfx/gfx_pkts.sv deleted file mode 100644 index 41399ce..0000000 --- a/rtl/gfx/gfx_pkts.sv +++ /dev/null @@ -1,29 +0,0 @@ -interface gfx_pkts -#(parameter int WIDTH = $bits(gfx::word)); - - import gfx::*; - - logic tlast; - logic tready; - logic tvalid; - logic[WIDTH - 1:0] tdata; - - modport tx - ( - input tready, - - output tdata, - tlast, - tvalid - ); - - modport rx - ( - input tdata, - tlast, - tvalid, - - output tready - ); - -endinterface diff --git a/rtl/gfx/gfx_raster.sv b/rtl/gfx/gfx_raster.sv index a57a672..6ade6ef 100644 --- a/rtl/gfx/gfx_raster.sv +++ b/rtl/gfx/gfx_raster.sv @@ -1,15 +1,14 @@ module gfx_raster +import gfx::*; ( - input logic clk, - rst_n, + input logic clk, + rst_n, - gfx_pkts.rx geometry, + if_pkts.rx geometry, - gfx_pkts.tx coverage + if_pkts.tx coverage ); - import gfx::*; - gfx_raster_bounds setup_bounds ( .clk, @@ -104,22 +103,21 @@ module gfx_raster endmodule module gfx_raster_bounds +import gfx::*; ( - input logic clk, - rst_n, + input logic clk, + rst_n, - gfx_pkts.rx geometry, + if_pkts.rx geometry, - input logic edges_ready, - output logic edges_valid, - output gfx::word edges_geom_id, - output gfx::fixed_xy edges_ref, - output gfx::raster_prec_xy edges_span, - output gfx::vtx_xy edges_vtx + input logic edges_ready, + output logic edges_valid, + output word edges_geom_id, + output fixed_xy edges_ref, + output raster_prec_xy edges_span, + output vtx_xy edges_vtx ); - import gfx::*; - enum int unsigned { IN_GEOM_ID, @@ -300,28 +298,27 @@ module gfx_raster_bounds endmodule module gfx_raster_edges +import gfx::*; ( - input logic clk, - rst_n, - - input logic bounds_valid, - input gfx::word bounds_geom_id, - input gfx::fixed_xy bounds_ref, - input gfx::raster_prec_xy bounds_span, - input gfx::vtx_xy bounds_vtx, - output logic bounds_ready, - - input logic coarse_ready, - output logic coarse_valid, - output gfx::word coarse_geom_id, - output gfx::fixed_xy coarse_ref, - output gfx::raster_prec_xy coarse_span, - output gfx::fixed coarse_base, - output gfx::raster_offsets_xy coarse_offsets + input logic clk, + rst_n, + + input logic bounds_valid, + input word bounds_geom_id, + input fixed_xy bounds_ref, + input raster_prec_xy bounds_span, + input vtx_xy bounds_vtx, + output logic bounds_ready, + + input logic coarse_ready, + output logic coarse_valid, + output word coarse_geom_id, + output fixed_xy coarse_ref, + output raster_prec_xy coarse_span, + output fixed coarse_base, + output raster_offsets_xy coarse_offsets ); - import gfx::*; - enum int unsigned { EDGE_AB, @@ -455,28 +452,27 @@ module gfx_raster_edges endmodule module gfx_raster_coarse +import gfx::*; ( - input logic clk, - rst_n, - - input logic edges_valid, - input gfx::word edges_geom_id, - input gfx::fixed_xy edges_ref, - input gfx::raster_prec_xy edges_span, - input gfx::fixed edges_base, - input gfx::raster_offsets_xy edges_offsets, - output logic edges_ready, - - input logic fine_ready, - output logic fine_valid, - output gfx::word fine_geom_id, - output gfx::fixed_xy fine_ref, - output gfx::fixed fine_corner, - output gfx::raster_offsets_xy fine_offsets + input logic clk, + rst_n, + + input logic edges_valid, + input word edges_geom_id, + input fixed_xy edges_ref, + input raster_prec_xy edges_span, + input fixed edges_base, + input raster_offsets_xy edges_offsets, + output logic edges_ready, + + input logic fine_ready, + output logic fine_valid, + output word fine_geom_id, + output fixed_xy fine_ref, + output fixed fine_corner, + output raster_offsets_xy fine_offsets ); - import gfx::*; - enum int unsigned { SETUP, @@ -668,22 +664,21 @@ module gfx_raster_coarse endmodule module gfx_raster_fine +import gfx::*; ( - input logic clk, - rst_n, + input logic clk, + rst_n, - input logic coarse_valid, - input gfx::word coarse_geom_id, - input gfx::fixed_xy coarse_ref, - input gfx::fixed coarse_corner, - input gfx::raster_offsets_xy coarse_offsets, - output logic coarse_ready, + input logic coarse_valid, + input word coarse_geom_id, + input fixed_xy coarse_ref, + input fixed coarse_corner, + input raster_offsets_xy coarse_offsets, + output logic coarse_ready, - gfx_pkts.tx coverage + if_pkts.tx coverage ); - import gfx::*; - enum int unsigned { IN_C, diff --git a/rtl/gfx/gfx_sched.sv b/rtl/gfx/gfx_sched.sv index 0ffaecd..03498e4 100644 --- a/rtl/gfx/gfx_sched.sv +++ b/rtl/gfx/gfx_sched.sv @@ -1,13 +1,13 @@ module gfx_sched import gfx::*; ( - input logic clk, - rst_n, - srst_n, + input logic clk, + rst_n, + srst_n, - gfx_axil.m axim, + if_axil.m axim, - input irq_lines irq + input irq_lines irq ); // verilator tracing_off diff --git a/rtl/gfx/gfx_shader.sv b/rtl/gfx/gfx_shader.sv index 322ffb5..6b81b41 100644 --- a/rtl/gfx/gfx_shader.sv +++ b/rtl/gfx/gfx_shader.sv @@ -2,17 +2,17 @@ module gfx_shader import gfx::*; import gfx_shader_schedif_pkg::*; ( - input logic clk, - rst_n, + input logic clk, + rst_n, - gfx_axib.m insn_mem, + if_axib.m insn_mem, - gfx_axil.s sched + if_axil.s sched ); axi4lite_intf #(.ADDR_WIDTH(GFX_SHADER_SCHEDIF_MIN_ADDR_WIDTH)) regblock(); - gfx_axil2regblock axil2regblock + if_axil2regblock axil2regblock ( .axis(sched), .axim(regblock.master) diff --git a/rtl/gfx/gfx_shader_back.sv b/rtl/gfx/gfx_shader_back.sv index 4929192..968a34b 100644 --- a/rtl/gfx/gfx_shader_back.sv +++ b/rtl/gfx/gfx_shader_back.sv @@ -15,7 +15,7 @@ import gfx::*; logic abort; gfx_wb out_wb(), p0_wb(), p1_wb(), p2_wb(), p3_wb(); - gfx_shake p1_shake(), p2_shake(), p3_shake(); + if_shake p1_shake(), p2_shake(), p3_shake(); gfx_shader_abort p0_abort ( @@ -97,13 +97,13 @@ endmodule module gfx_shader_abort ( - input logic clk, + input logic clk, - gfx_shake.peek p1, - p2, - p3, + if_shake.peek p1, + p2, + p3, - output logic abort + output logic abort ); always_ff @(posedge clk) diff --git a/rtl/gfx/gfx_shader_front.sv b/rtl/gfx/gfx_shader_front.sv index 52074fd..0a2b8b8 100644 --- a/rtl/gfx/gfx_shader_front.sv +++ b/rtl/gfx/gfx_shader_front.sv @@ -34,7 +34,7 @@ import gfx::*; input logic clk, rst_n, - gfx_axib.m fetch_mem, + if_axib.m fetch_mem, input logic icache_flush, @@ -101,7 +101,7 @@ import gfx::*; input logic clk, rst_n, - gfx_axib.m mem, + if_axib.m mem, input logic icache_flush, @@ -116,7 +116,7 @@ import gfx::*; localparam int ICACHE_STAGES = 6; localparam int BIND_STAGES = REGFILE_STAGES + ICACHE_STAGES; - gfx_beats #($bits(group_id)) runnable_in(), runnable_out(); + if_beats #($bits(group_id)) runnable_in(), runnable_out(); logic ar_stall, request_ready, request_valid, valids[BIND_STAGES]; group_id groups[BIND_STAGES]; @@ -251,7 +251,7 @@ import gfx::*; oword data; } cache[1 << $bits(icache_line_num)], read, read_hold; - gfx_beats #($bits(icache_line_tag)) pending_in(), pending_out(); + if_beats #($bits(icache_line_tag)) pending_in(), pending_out(); logic accessed_write, accessed_write_enable, burst, fetch_done, hit_write, in_flush, hit_commit, hit_write_enable, retry_4, retry_5, rollback, diff --git a/rtl/gfx/gfx_shader_group.sv b/rtl/gfx/gfx_shader_group.sv index e668877..4a602a8 100644 --- a/rtl/gfx/gfx_shader_group.sv +++ b/rtl/gfx/gfx_shader_group.sv @@ -9,7 +9,7 @@ import gfx::*; gfx_regfile_io.ab read_data, - gfx_shake.rx in_shake, + if_shake.rx in_shake, gfx_wb.tx wb ); diff --git a/rtl/gfx/gfx_shader_mem.sv b/rtl/gfx/gfx_shader_mem.sv index 403c9e4..d9e4ff4 100644 --- a/rtl/gfx/gfx_shader_mem.sv +++ b/rtl/gfx/gfx_shader_mem.sv @@ -9,7 +9,7 @@ import gfx::*; gfx_regfile_io.ab read_data, - gfx_shake.rx in_shake, + if_shake.rx in_shake, gfx_wb.tx wb ); diff --git a/rtl/gfx/gfx_shader_sfu.sv b/rtl/gfx/gfx_shader_sfu.sv index d65e522..f15ff04 100644 --- a/rtl/gfx/gfx_shader_sfu.sv +++ b/rtl/gfx/gfx_shader_sfu.sv @@ -9,7 +9,7 @@ import gfx::*; gfx_regfile_io.ab read_data, - gfx_shake.rx in_shake, + if_shake.rx in_shake, gfx_wb.tx wb ); diff --git a/rtl/gfx/gfx_shake.sv b/rtl/gfx/gfx_shake.sv deleted file mode 100644 index baae0c3..0000000 --- a/rtl/gfx/gfx_shake.sv +++ /dev/null @@ -1,24 +0,0 @@ -interface gfx_shake; - - logic ready; - logic valid; - - modport tx - ( - input ready, - output valid - ); - - modport rx - ( - input valid, - output ready - ); - - modport peek - ( - input ready, - valid - ); - -endinterface diff --git a/rtl/gfx/gfx_sim_debug.sv b/rtl/gfx/gfx_sim_debug.sv index 4b4622a..c618636 100644 --- a/rtl/gfx/gfx_sim_debug.sv +++ b/rtl/gfx/gfx_sim_debug.sv @@ -1,10 +1,10 @@ module gfx_sim_debug import gfx::*; ( - input logic clk, - rst_n, + input logic clk, + rst_n, - gfx_axil.s axis + if_axil.s axis ); enum int unsigned diff --git a/rtl/gfx/gfx_xbar_sched.sv b/rtl/gfx/gfx_xbar_sched.sv index 95e4afb..5661012 100644 --- a/rtl/gfx/gfx_xbar_sched.sv +++ b/rtl/gfx/gfx_xbar_sched.sv @@ -1,14 +1,14 @@ module gfx_xbar_sched import gfx::*; ( - input logic clk, - srst_n, + input logic clk, + srst_n, - gfx_axil.s sched, + if_axil.s sched, - gfx_axil.m debug, - gfx_axil.m bootrom, - gfx_axil.m shader_0 + if_axil.m debug, + if_axil.m bootrom, + if_axil.m shader_0 ); localparam word BOOTROM_MASK = 32'hfff0_0000; diff --git a/rtl/gfx/mod.mk b/rtl/gfx/mod.mk index 7525276..3c27a4a 100644 --- a/rtl/gfx/mod.mk +++ b/rtl/gfx/mod.mk @@ -1,7 +1,7 @@ cores := gfx_shader_schedif define core - $(this)/deps := axixbar gfx_shader_schedif picorv32 + $(this)/deps := axixbar gfx_shader_schedif if_common picorv32 $(this)/rtl_top := gfx_top $(this)/rtl_dirs := . diff --git a/rtl/if_common/if_axib.sv b/rtl/if_common/if_axib.sv new file mode 100644 index 0000000..6db8518 --- /dev/null +++ b/rtl/if_common/if_axib.sv @@ -0,0 +1,80 @@ +// AXI4 con burst +interface if_axib +#(int WIDTH = 32); + + logic awvalid, + awready; + logic[7:0] awlen; + logic[1:0] awburst; + logic[WIDTH - 1:0] awaddr; + + logic wlast; + logic wvalid; + logic wready; + logic[WIDTH - 1:0] wdata; + + logic bvalid; + logic bready; + + logic arvalid, + arready; + logic[7:0] arlen; + logic[1:0] arburst; + logic[WIDTH - 1:0] araddr; + + logic rlast; + logic rvalid; + logic rready; + logic[WIDTH - 1:0] rdata; + + modport m + ( + input awready, + wready, + bvalid, + arready, + rlast, + rvalid, + rdata, + + output awlen, + awburst, + awvalid, + awaddr, + wlast, + wvalid, + wdata, + bready, + arlen, + arburst, + arvalid, + araddr, + rready + ); + + modport s + ( + input awlen, + awburst, + awvalid, + awaddr, + wlast, + wvalid, + wdata, + bready, + arlen, + arburst, + arvalid, + araddr, + rready, + + output awready, + wready, + bvalid, + arready, + rlast, + rvalid, + rdata + ); + +endinterface diff --git a/rtl/if_common/if_axil.sv b/rtl/if_common/if_axil.sv new file mode 100644 index 0000000..cf67e3f --- /dev/null +++ b/rtl/if_common/if_axil.sv @@ -0,0 +1,61 @@ +// AXI4-Lite, sin wstrb ni axprot +interface if_axil +#(int WIDTH = 32); + + logic awvalid; + logic awready; + logic[WIDTH - 1:0] awaddr; + + logic wvalid; + logic wready; + logic[WIDTH - 1:0] wdata; + + logic bvalid; + logic bready; + + logic arvalid; + logic arready; + logic[WIDTH - 1:0] araddr; + + logic rvalid; + logic rready; + logic[WIDTH - 1:0] rdata; + + modport m + ( + input awready, + wready, + bvalid, + arready, + rvalid, + rdata, + + output awvalid, + awaddr, + wvalid, + wdata, + bready, + arvalid, + araddr, + rready + ); + + modport s + ( + input awvalid, + awaddr, + wvalid, + wdata, + bready, + arvalid, + araddr, + rready, + + output awready, + wready, + bvalid, + arready, + rvalid, + rdata + ); +endinterface diff --git a/rtl/if_common/if_axil2regblock.sv b/rtl/if_common/if_axil2regblock.sv new file mode 100644 index 0000000..d3c20d9 --- /dev/null +++ b/rtl/if_common/if_axil2regblock.sv @@ -0,0 +1,30 @@ +module if_axil2regblock +( + if_axil.s axis, + axi4lite_intf.master axim +); + + assign axis.rdata = axim.RDATA; + assign axis.rvalid = axim.RVALID; + assign axis.bvalid = axim.BVALID; + assign axis.wready = axim.WREADY; + assign axis.arready = axim.ARREADY; + assign axis.awready = axim.AWREADY; + + assign axim.AWVALID = axis.awvalid; + assign axim.AWADDR = axis.awaddr[$bits(axim.AWADDR) - 1:0]; + assign axim.AWPROT = '0; + + assign axim.WVALID = axis.wvalid; + assign axim.WDATA = axis.wdata; + assign axim.WSTRB = '1; + + assign axim.BREADY = axis.bready; + + assign axim.ARVALID = axis.arvalid; + assign axim.ARADDR = axis.araddr[$bits(axim.ARADDR) - 1:0]; + assign axim.ARPROT = '0; + + assign axim.RREADY = axis.rready; + +endmodule diff --git a/rtl/if_common/if_beats.sv b/rtl/if_common/if_beats.sv new file mode 100644 index 0000000..f9e58e9 --- /dev/null +++ b/rtl/if_common/if_beats.sv @@ -0,0 +1,29 @@ +interface if_beats +#(int WIDTH = 32); + + logic[WIDTH - 1:0] data; + logic ready; + logic valid; + + modport tx + ( + input ready, + output data, + valid + ); + + modport rx + ( + input data, + valid, + output ready + ); + + modport peek + ( + input data, + ready, + valid + ); + +endinterface diff --git a/rtl/if_common/if_pkts.sv b/rtl/if_common/if_pkts.sv new file mode 100644 index 0000000..b6e5b0b --- /dev/null +++ b/rtl/if_common/if_pkts.sv @@ -0,0 +1,27 @@ +interface if_pkts +#(int WIDTH = 32); + + logic tlast; + logic tready; + logic tvalid; + logic[WIDTH - 1:0] tdata; + + modport tx + ( + input tready, + + output tdata, + tlast, + tvalid + ); + + modport rx + ( + input tdata, + tlast, + tvalid, + + output tready + ); + +endinterface diff --git a/rtl/if_common/if_shake.sv b/rtl/if_common/if_shake.sv new file mode 100644 index 0000000..8ec5a73 --- /dev/null +++ b/rtl/if_common/if_shake.sv @@ -0,0 +1,24 @@ +interface if_shake; + + logic ready; + logic valid; + + modport tx + ( + input ready, + output valid + ); + + modport rx + ( + input valid, + output ready + ); + + modport peek + ( + input ready, + valid + ); + +endinterface diff --git a/rtl/if_common/mod.mk b/rtl/if_common/mod.mk new file mode 100644 index 0000000..e60abc4 --- /dev/null +++ b/rtl/if_common/mod.mk @@ -0,0 +1,3 @@ +define core + $(this)/rtl_dirs := . +endef diff --git a/rtl/mod.mk b/rtl/mod.mk index 2fb0ffa..d1ab444 100644 --- a/rtl/mod.mk +++ b/rtl/mod.mk @@ -1,5 +1,5 @@ cores := config debounce intc -subdirs := cache core dma_axi32 fpu gfx legacy_gfx perf picorv32 pkt_switch smp top wb2axip +subdirs := cache core dma_axi32 if_common fpu gfx legacy_gfx perf picorv32 pkt_switch smp top wb2axip define core/config $(this)/rtl_include_dirs := . -- cgit v1.2.3