From 5e5707f0efa72577513a1f06d91c3f14e5c407d6 Mon Sep 17 00:00:00 2001 From: Alejandro Soto Date: Sat, 24 Sep 2022 00:22:09 -0600 Subject: Fix timing analysis file --- conspiracion.sdc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/conspiracion.sdc b/conspiracion.sdc index b0a2ad4..66d23f5 100644 --- a/conspiracion.sdc +++ b/conspiracion.sdc @@ -1,3 +1,3 @@ -create_clock -period 50MHz -name clk_clk +create_clock -period 20 -name clk_clk [get_ports clk_clk] derive_pll_clocks derive_clock_uncertainty -- cgit v1.2.3