| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2022-11-09 | Update fetch, decode testbenches | Alejandro Soto | |
| 2022-11-07 | Añade testbench para fetch y decode | JulianCamacho | |
| 2022-11-07 | Adding decode instructions for test | JulianCamacho | |
| 2022-11-07 | Adding decode test | JulianCamacho | |
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index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
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