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path: root/tb/top/conspiracion.cpp (unfollow)
AgeCommit message (Expand)Author
2024-02-20rtl, tb: add core.mk filesAlejandro Soto
2023-10-28platform: implement support for disabling CPUsAlejandro Soto
2023-10-05rtl/perf: implement performance unitAlejandro Soto
2023-10-05Makefile, tb: add support for cocotbAlejandro Soto
2023-10-04sim: implement fst tracesAlejandro Soto
2023-10-04rtl/cache: increase to 64KiB per coreAlejandro Soto
2023-10-04demo: implement cache debugAlejandro Soto
2023-10-04rtl/cache: implement debug interfaceAlejandro Soto
2023-10-03tb: fix halt forceAlejandro Soto
2023-10-02tb: implement verilated slavesAlejandro Soto
2023-10-01tb: implement quad-core SMPAlejandro Soto
2023-09-29tb: enable sim performance flags ("faster is better")Alejandro Soto
2023-09-25tb: implement coverage reportsAlejandro Soto
2023-09-25rtl/core, tb: replace bus_master with a new top-level moduleAlejandro Soto
2023-09-25tb: implement cache ringAlejandro Soto
2023-09-24tb: implement support for cache line-sized slavesAlejandro Soto
2022-12-16Improve simulation performance for the most common caseAlejandro Soto
2022-12-16Implement branch history (simulation only)Alejandro Soto
2022-12-16Fix implementation of MMU access faultsAlejandro Soto
2022-12-16Implement interrupt controllerAlejandro Soto
2022-12-16Implement fast videoAlejandro Soto
2022-12-16Fix sysctrl register dumpAlejandro Soto
2022-12-16Implement page walks in patch-memAlejandro Soto
2022-12-16Implement gdbstub monitorAlejandro Soto
2022-12-16Show main cp15 registers in register dumpsAlejandro Soto
2022-12-16Implement register writes from gdbAlejandro Soto
2022-12-16Implement hardware virtual memoryAlejandro Soto
2022-12-08Support gdb interruptsAlejandro Soto
2022-12-07Make the cycle limit optionalAlejandro Soto
2022-12-07Implement single-steppingAlejandro Soto
2022-12-06Implement breakpointsAlejandro Soto
2022-12-06Implement gdbstubAlejandro Soto
2022-11-20Add tick, bail signals to simulated Avalon slavesAlejandro Soto
2022-11-19Implement JTAG-UART inputAlejandro Soto
2022-11-19Implement interval timer simulationAlejandro Soto
2022-11-17Finish simulationAlejandro Soto
2022-11-17Implement sim test: descifradorAlejandro Soto
2022-11-16Gracefully exit when Avalon assertions fail during simulationAlejandro Soto
2022-11-16Implement JTAG-UART tx emulationAlejandro Soto
2022-11-14Implement VGA simulationAlejandro Soto
2022-11-13Implement CPU haltAlejandro Soto
2022-11-13Add reset debounceAlejandro Soto
2022-11-09Implement initial state randomization in simAlejandro Soto
2022-11-06Export PSRs to simulationAlejandro Soto
2022-10-18Support program counter in --dump-regsAlejandro Soto
2022-10-18Implement register initialization in simAlejandro Soto
2022-10-16Implement register dumpsAlejandro Soto
2022-10-16Implement simulation testbenchesAlejandro Soto
2022-09-27Add simple loop execution testbenchAlejandro Soto
2022-09-25Rename HPS SDRAM testbench fileAlejandro Soto
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