summaryrefslogtreecommitdiff
path: root/tb/sim (unfollow)
AgeCommit message (Expand)Author
2023-10-03tb/sim/strex: test monitor after exceptionAlejandro Soto
2023-10-03tb/sim: add test: strexAlejandro Soto
2023-10-02tb/sim: add test: smp_bootAlejandro Soto
2023-09-25rtl/cache: fix writeback corruptionAlejandro Soto
2023-09-25tb: implement cache ringAlejandro Soto
2022-12-18Implement privileged ldm/stm of user registersAlejandro Soto
2022-12-18Fix datapath of shifter carry-out during adc/sbc/rscAlejandro Soto
2022-12-16Implement swi (system call)Alejandro Soto
2022-12-16Fix register corruption when interrupting a load-storeAlejandro Soto
2022-12-16Implement interrupt emulationAlejandro Soto
2022-12-16Implement fast videoAlejandro Soto
2022-12-16Implement prefetch abortsAlejandro Soto
2022-12-16Implement MMU access checksAlejandro Soto
2022-12-16Implement data abortsAlejandro Soto
2022-12-16Implement hardware virtual memoryAlejandro Soto
2022-12-09Implement CP15 ID registerAlejandro Soto
2022-12-09Implement cp15 controlAlejandro Soto
2022-12-08Fix decoding of msr with immediate operandAlejandro Soto
2022-12-07Fix register-indirect shiftsAlejandro Soto
2022-12-06Implement gdbstubAlejandro Soto
2022-11-19Implement JTAG-UART inputAlejandro Soto
2022-11-17Finish simulationAlejandro Soto
2022-11-17Fix simAlejandro Soto
2022-11-17Implement sim test: descifradorAlejandro Soto
2022-11-17Bug fixesJulianCamacho
2022-11-16Implement bx lrAlejandro Soto
2022-11-16Implement privilege escalationAlejandro Soto
2022-11-16Implement psr read/write logicAlejandro Soto
2022-11-16Add sim test: subwordAlejandro Soto
2022-11-14Implement VGA simulationAlejandro Soto
2022-11-10Implement support for predictable x-values in simAlejandro Soto
2022-11-09Improve sdram sim testAlejandro Soto
2022-11-09Implement initial state randomization in simAlejandro Soto
2022-11-09Fix bus protocol errors in bus masterAlejandro Soto
2022-11-08Fix handling of multi-cycle Avalon waitrequest states in bus masterAlejandro Soto
2022-11-08Add sim: sdramAlejandro Soto
2022-11-07Add test sim: modeswitchAlejandro Soto
2022-11-07Improve mult simAlejandro Soto
2022-10-31Show simulator output in sim testbenchesAlejandro Soto
2022-10-25Implement explicit sim state dumpAlejandro Soto
2022-10-25Add sim test: tarea2Alejandro Soto
2022-10-23Add sim test: shiftsAlejandro Soto
2022-10-23Add sim test: stackAlejandro Soto
2022-10-18Add sim test: control_flowAlejandro Soto
2022-10-18Add sim test: multAlejandro Soto
2022-10-18Print simulator command line on test failureAlejandro Soto
2022-10-18Support skipping testsAlejandro Soto
2022-10-18Implement register initialization in simAlejandro Soto
2022-10-17Break false dependency on r0 for MOV/MVNAlejandro Soto
2022-10-17Improve sim.py outputAlejandro Soto
generated by cgit v1.2.3 (git 2.25.1) at 2026-04-17 13:11:32 +0000