index
:
conspiracion
master
Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
tb
/
avalon.impl.hpp
(
unfollow
)
Age
Commit message (
Expand
)
Author
2023-10-05
tb: move most C++ source files to tb/top/conspiracion
Alejandro Soto
2023-10-02
tb: implement verilated slaves
Alejandro Soto
2023-09-29
tb: read line-sized reads of word-sized I/O slaves
Alejandro Soto
2023-09-29
tb/avalon: fix line equality comparisong
Alejandro Soto
2023-09-25
tb: implement cache ring
Alejandro Soto
2022-12-16
Improve simulation performance for the most common case
Alejandro Soto
2022-12-16
Implement interrupt controller
Alejandro Soto
2022-12-16
Implement register writes from gdb
Alejandro Soto
2022-12-16
Implement hardware virtual memory
Alejandro Soto
2022-12-06
Implement gdbstub
Alejandro Soto
2022-11-20
Add tick, bail signals to simulated Avalon slaves
Alejandro Soto
2022-11-16
Gracefully exit when Avalon assertions fail during simulation
Alejandro Soto
2022-11-14
Implement VGA simulation
Alejandro Soto
2022-11-09
Implement initial state randomization in sim
Alejandro Soto
2022-10-16
Implement simulation testbenches
Alejandro Soto
2022-10-15
Rework bus architecture
Alejandro Soto
2022-09-18
Fix memory simulation
Alejandro Soto
2022-09-18
Add Avalon-MM emulator
Alejandro Soto