| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2024-05-24 | rtl: fix quartus errors: parser, synthesis, fitter | Alejandro Soto | |
| 2024-05-12 | platform/wavelet3d: enable FPU, JTAG in host CPU | Alejandro Soto | |
| 2024-05-06 | platform/wavelet3d: add platform interconnect | Alejandro Soto | |
| 2024-05-06 | rtl/if_common: add id, resp, size, strb signals to if_axib | Alejandro Soto | |
| 2024-05-05 | rtl/if_common: initial commit, moved out of gfx | Alejandro Soto | |
 |
index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
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