| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2023-11-18 | rtl/gfx: fix Verilator loop unrolling bug in gfx_pipes | Alejandro Soto | |
| 2023-11-16 | rtl/gfx: improve divider timing closure | Alejandro Soto | |
| 2023-11-10 | rtl/gfx: replace duplicated pipes with gfx_pipes | Alejandro Soto | |
| 2023-11-10 | rtl/gfx: add gfx_pipes | Alejandro Soto | |
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index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
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