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Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.
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rtl
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gfx
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gfx_defs.sv
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2023-11-14
rtl/gfx: add z, w coordinates to vertices
Alejandro Soto
2023-11-14
rtl/gfx: pass barycentric coords from fine raster to fragment shading
Alejandro Soto
2023-11-14
rtl/gfx: implement perspective-corrected barycentric coordinates
Alejandro Soto
2023-11-14
rtl/gfx: implement fixed-point division
Alejandro Soto
2023-11-14
rtl/gfx: implement fragment shading
Alejandro Soto
2023-11-11
rtl/gfx: implement fragment address linearization
Alejandro Soto
2023-11-10
rtl/gfx: use packed arrays in module interfaces
Alejandro Soto
2023-11-10
rtl/gfx: implement fixed-point FMA
Alejandro Soto
2023-11-10
rtl/gfx: implement fine rasterization
Alejandro Soto
2023-11-10
rtl/gfx: implement edge offset setup
Alejandro Soto
2023-11-10
rtl/gfx: implement perspective division
Alejandro Soto
2023-11-02
ip: add ip_fp_inv
Alejandro Soto
2023-10-29
rtl/gfx: implement double-buffered scanout
Alejandro Soto
2023-10-26
rtl/gfx: synchronize clock with SDRAM
Alejandro Soto
2023-10-22
rtl/gfx: reimplement multiplier as a much smaller mat-vec pipeline
Alejandro Soto
2023-10-21
ip: downgrade to 16-bit floats
Alejandro Soto
2023-10-21
rtl/gfx: implement non-synthesizable matrix multiplier
Alejandro Soto