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AgeCommit message (Collapse)Author
2022-10-23Fix zero-extended (lsr) vs sign-extended (asr) shiftsAlejandro Soto
2022-10-23Fix bad decoding of second-operand immediatesAlejandro Soto
2022-10-18Implement branch with linkAlejandro Soto
2022-10-18Implement undefined instruction exceptionsAlejandro Soto
2022-10-17Break false dependency on r0 for MOV/MVNAlejandro Soto
2022-10-17Fix unsafe decode signalsAlejandro Soto
2022-10-16Move isa.sv to core/decodeAlejandro Soto
2022-10-15Fix flags and writeback hazardsAlejandro Soto
2022-10-09Implement most memory transactionsAlejandro Soto
2022-10-08Implement LDR/STR decodeAlejandro Soto
2022-10-02Split decoding of flexible second operand out of data instructionsAlejandro Soto
2022-10-02Major shifter-ALU redesignAlejandro Soto
The shifter unit now works in parallel with the ALU and is no longer part of it. Instructions that use the shifter as input to the ALU will now take an additional cycle, unless the control unit can detect a "trivial shift" situation where the shifter's output will be the same as its input. This change improves Fmax substantially.
2022-09-27Fix branching bugsAlejandro Soto
2022-09-26Fix shifter addressing modesAlejandro Soto
2022-09-25Implement shifter decodingAlejandro Soto
2022-09-25Implement flag updatesAlejandro Soto
2022-09-25Refactor CPSR and uarch.svAlejandro Soto
2022-09-25Fix Quartus issuesAlejandro Soto
2022-09-25Implement ALU opcode decodingAlejandro Soto
2022-09-25Implement branch handling in decodeAlejandro Soto
2022-09-25Use word/ptr instead of logic[..]Alejandro Soto
2022-09-24Implement initial decoderAlejandro Soto
2022-09-24Implement decode of branch instructionsAlejandro Soto
2022-09-24Implement decode of ALU instructionsAlejandro Soto
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