conspiracion - Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.

Age	Commit message (Expand)	Author
2023-10-04	improve comments	Fabian Montero
2023-10-04	sram comments	JulianCamacho
2023-10-04	fix typo	Fabian Montero
2023-10-04	explica composición de cache en archivo SRAM.	Fabian Montero
2023-10-04	improve comments	Fabian Montero
2023-10-04	sram comment	JulianCamacho
2023-10-04	explica mejor las transiciones de routing	Fabian Montero
2023-10-04	explica estados de routing	Fabian Montero
2023-10-04	rtl/cache: increase to 64KiB per core	Alejandro Soto
2023-10-04	rtl/cache: implement debug interface	Alejandro Soto
2023-10-04	routing and beginning cache control comments	JulianCamacho
2023-10-03	sram, offset and routing comments	JulianCamacho
2023-10-03	rtl/cache: implement ll/sc line monitor	Alejandro Soto
2023-10-03	comentarios	JulianCamacho
2023-10-02	rtl/cache: fix coherence bug during snoops (in_hold latched too early)	Alejandro Soto
2023-10-02	rtl: implement exclusive monitor datapath	Alejandro Soto
2023-10-01	rtl/cache: fix controller deadlock on cache-cache reply	Alejandro Soto
2023-09-29	platform: add CPUs and caches to qsys	Alejandro Soto
2023-09-25	rtl/cache: fix writeback corruption	Alejandro Soto
2023-09-25	rtl/cache: implement wait-for-reply	Alejandro Soto
2023-09-24	rtl/cache: implement	Alejandro Soto