| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2023-10-04 | rtl/cache: increase to 64KiB per core | Alejandro Soto | |
| 2023-10-04 | demo: implement cache debug | Alejandro Soto | |
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index : conspiracion | |
| Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator. |
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