conspiracion - Linux-capable SoC platform with a custom ARMv4 quad-core SMP CPU, coherent caches, and a 3D graphics accelerator. Synthesizes for Terasic DE-series FPGA boards. Simulated with Verilator.

Age	Commit message (Expand)	Author
2022-11-16	Implement privilege escalation	Alejandro Soto
2022-11-16	Se modifica la llave para manejo de alpha y bytes	JulianCamacho
2022-11-16	Add bin2mw for flashing small programs directly from U-Boot console	Alejandro Soto
2022-11-16	Añade programa	JulianCamacho
2022-11-16	Implement psr read/write logic	Alejandro Soto
2022-11-16	image: adds image convertion tool	Fabián Montero
2022-11-16	Simplify flags datapath	Alejandro Soto
2022-11-16	Finish decode of psr operations	Alejandro Soto
2022-11-16	Fix final_writeback condition bug	Alejandro Soto
2022-11-16	Add sim test: subword	Alejandro Soto
2022-11-16	Fix decoding of LDST_MISC group	Alejandro Soto
2022-11-15	Implemente byte-enable signal in stores	Alejandro Soto
2022-11-15	Fix false undefined exception	Alejandro Soto
2022-11-15	Fix shr carry bug	Alejandro Soto
2022-11-15	Implement sub-word memory accesses	Alejandro Soto
2022-11-15	Rewrite duplicate ldst logic as signal ldst_next	Alejandro Soto
2022-11-15	Add untested warning to mul.sv	Alejandro Soto
2022-11-15	Mpve combinational logic out of arm810.sv	Alejandro Soto
2022-11-15	Rename existing MMU components to MMU arbiter	Alejandro Soto
2022-11-15	Replace vga_controller with streaming Altera IP	Alejandro Soto
2022-11-14	Fix VRAM clock	Alejandro Soto
2022-11-14	Add modified Signal Tap test	Alejandro Soto
2022-11-14	Add JTAG debug bridge	Alejandro Soto
2022-11-14	Implement VGA simulation	Alejandro Soto
2022-11-14	Implement VGA controller	Alejandro Soto
2022-11-13	Restore clock connections in Platform Designer	Alejandro Soto
2022-11-13	Fix big Quartus state transition bug	Alejandro Soto
2022-11-13	Convert core state machines to Quartus-inferring RTL	Alejandro Soto
2022-11-13	Implement CPU halt	Alejandro Soto
2022-11-13	Increment debounce wait time	Alejandro Soto
2022-11-13	Document reset issues	Alejandro Soto
2022-11-13	Add Signal Tap bus master sniffer	Alejandro Soto
2022-11-13	Route cpu_rst_n signal through bus master	Alejandro Soto
2022-11-13	Add reset debounce	Alejandro Soto
2022-11-13	Hardwire PLL reset to ground	Alejandro Soto
2022-11-13	Add debug instrumentation	Alejandro Soto
2022-11-13	Simplify stall conditions to reflect uarch changes	Alejandro Soto
2022-11-10	app: añade aplicación en ASM	Fabián Montero
2022-11-10	Fix fetch discard glitches on flush	Alejandro Soto
2022-11-10	Load taller_bootrom.bin in kermit script	Alejandro Soto
2022-11-10	Implement support for predictable x-values in sim	Alejandro Soto
2022-11-10	Fix reset glitches	Alejandro Soto
2022-11-10	Fix flush-stall relationship in porch	Alejandro Soto
2022-11-09	Improve sdram sim test	Alejandro Soto
2022-11-09	Implement initial state randomization in sim	Alejandro Soto
2022-11-09	Implement reset	Alejandro Soto
2022-11-09	Fix bus master connections in qsys	Alejandro Soto
2022-11-09	Add reset signal to bus master	Alejandro Soto
2022-11-09	Update soc_system.cof	Alejandro Soto
2022-11-09	Fix bus protocol errors in bus master	Alejandro Soto