diff options
Diffstat (limited to 'tb/sim')
| -rw-r--r-- | tb/sim/modeswitch.S | 39 | ||||
| -rw-r--r-- | tb/sim/modeswitch.py | 2 |
2 files changed, 25 insertions, 16 deletions
diff --git a/tb/sim/modeswitch.S b/tb/sim/modeswitch.S index 384eb65..b798700 100644 --- a/tb/sim/modeswitch.S +++ b/tb/sim/modeswitch.S @@ -1,23 +1,30 @@ .global reset reset: - mov r6, lr - msr cpsr_c, #0xd3 - mrs r0, cpsr + ldr r0, =0xfee1dead + push {sp-lr} + push {r0} + @ NOTE: Esto genera una warning de gas debido a UNPREDICTABLE + @ writeback of base register, podría ser un bug del ensamblador, + @ pero también podría ser la interpretación correcta del manual + ldmia sp!, {ip-lr}^ + mov r6, lr + msr cpsr_c, #0xd3 + mrs r0, cpsr udf - mrs r2, cpsr - ldr r3, =#0x16f - bic r3, r2, r3 - msr cpsr_fxc, r3 - mrs r4, cpsr - cmp r0, r0 - mrs r5, spsr + mrs r2, cpsr + ldr r3, =#0x16f + bic r3, r2, r3 + msr cpsr_fxc, r3 + mrs r4, cpsr + cmp r0, r0 + mrs r5, spsr nop - msr cpsr_fxc, r0 - msr spsr_fxc, r0 - mov pc, r6 + msr cpsr_fxc, r0 + msr spsr_fxc, r0 + mov pc, lr .global undefined undefined: - mrs r1, spsr - mrs r13, cpsr - movs pc, lr + mrs r1, spsr + mrs r13, cpsr + movs pc, lr diff --git a/tb/sim/modeswitch.py b/tb/sim/modeswitch.py index e33d906..1e6e193 100644 --- a/tb/sim/modeswitch.py +++ b/tb/sim/modeswitch.py @@ -7,4 +7,6 @@ def final(): assert_reg(r5, 0x6000_0190) assert_reg(cpsr, 0x0000_0190) assert_reg(r13_svc, 0x2000_0000) + assert_reg(r13_usr, 0x2000_0000) + assert_reg(r12_usr, 0xfee1_dead) assert_reg(r13_und, 0x0000_01db) |