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-rw-r--r--rtl/core/control/control.sv2
1 files changed, 1 insertions, 1 deletions
diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv
index 3b1b797..e1bdbb8 100644
--- a/rtl/core/control/control.sv
+++ b/rtl/core/control/control.sv
@@ -70,7 +70,7 @@ module core_control
word saved_base, mem_offset, vector;
reg_num r_shift, final_rd, popped_upper, popped_lower, popped;
reg_list mem_regs, next_regs_upper, next_regs_lower;
- ptr pc, next_pc_visible;
+ ptr pc /*verilator public*/, next_pc_visible;
assign stall = next_cycle != ISSUE || next_bubble;
assign reg_mode = `MODE_SVC; //TODO