diff options
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/arm810.sv | 8 | ||||
| -rw-r--r-- | rtl/core/core.sv | 4 | ||||
| -rw-r--r-- | rtl/smp/pe.sv | 2 | ||||
| -rw-r--r-- | rtl/smp/smp_ctrl.sv | 8 |
4 files changed, 9 insertions, 13 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index 6f798f4..f498a15 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -7,8 +7,8 @@ module arm810 rst_n, input logic irq, - halt, - step, + halt /*verilator public*/ /*verilator forceable*/, + step /*verilator public*/ /*verilator forceable*/, output ptr bus_addr, output logic bus_start, @@ -18,8 +18,8 @@ module arm810 output word bus_data_wr, output logic[3:0] bus_data_be, - output logic halted, - breakpoint + output logic halted /*verilator public*/, + breakpoint /*verilator public*/ ); ptr branch_target, fetch_insn_pc, fetch_head, insn_addr; diff --git a/rtl/core/core.sv b/rtl/core/core.sv index 8d487fa..3703fe4 100644 --- a/rtl/core/core.sv +++ b/rtl/core/core.sv @@ -45,10 +45,6 @@ module core .bus_ready(ready), .bus_write(write), .bus_start(start), -`ifndef VERILATOR - .step(0), - .breakpoint(), -`endif .* ); diff --git a/rtl/smp/pe.sv b/rtl/smp/pe.sv index f50ed2f..adbeee4 100644 --- a/rtl/smp/pe.sv +++ b/rtl/smp/pe.sv @@ -1,4 +1,4 @@ -module mp_pe +module smp_pe #(parameter IS_BSP=0) ( input logic clk, diff --git a/rtl/smp/smp_ctrl.sv b/rtl/smp/smp_ctrl.sv index b6123ad..4d6d1a5 100644 --- a/rtl/smp/smp_ctrl.sv +++ b/rtl/smp/smp_ctrl.sv @@ -37,7 +37,7 @@ module smp_ctrl // No hay addresses assign write = avl_write; - mp_pe #(.IS_BSP(1)) pe_0 + smp_pe #(.IS_BSP(1)) pe_0 ( .step(step_0), .halt(halt_0), @@ -48,7 +48,7 @@ module smp_ctrl .* ); - mp_pe pe_1 + smp_pe pe_1 ( .step(step_1), .halt(halt_1), @@ -59,7 +59,7 @@ module smp_ctrl .* ); - mp_pe pe_2 + smp_pe pe_2 ( .step(step_2), .halt(halt_2), @@ -70,7 +70,7 @@ module smp_ctrl .* ); - mp_pe pe_3 + smp_pe pe_3 ( .step(step_3), .halt(halt_3), |