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Diffstat (limited to '')
| -rw-r--r-- | rtl/core/arm810.sv | 25 |
1 files changed, 19 insertions, 6 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index a8e197b..81d9883 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -12,19 +12,19 @@ module arm810 output word bus_data_wr ); - logic stall, prefetch_flush; + logic stall, prefetch_flush, insn_start; word insn; - ptr fetch_insn_pc; + ptr fetch_insn_pc, insn_addr; core_fetch #(.PREFETCH_ORDER(2)) fetch ( .branch(explicit_branch | wr_pc), .flush(0), //TODO .target(wr_pc ? wr_value[29:0] : branch_target), - .addr(bus_addr), - .fetched(bus_ready), - .fetch_data(bus_data_rd), - .fetch(bus_start), + .addr(insn_addr), + .fetched(insn_ready), + .fetch_data(insn_data_rd), + .fetch(insn_start), .insn_pc(fetch_insn_pc), .* ); @@ -112,4 +112,17 @@ module arm810 .c(c_shifter) ); + //TODO + ptr data_addr; + logic data_start, data_write, data_ready; + word data_data_rd, data_data_wr; + + logic insn_ready; + word insn_data_rd; + + core_mmu mmu + ( + .* + ); + endmodule |