diff options
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/arm810.sv | 4 | ||||
| -rw-r--r-- | rtl/core/control/control.sv | 3 | ||||
| -rw-r--r-- | rtl/core/decode/data.sv | 11 | ||||
| -rw-r--r-- | rtl/core/decode/decode.sv | 10 |
4 files changed, 22 insertions, 6 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index 91f48db..6d4880f 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -29,11 +29,12 @@ module arm810 .* ); - logic dec_execute, dec_conditional, dec_undefined, dec_writeback, dec_branch, dec_update_flags; ptr dec_branch_offset; snd_decode dec_snd; data_decode dec_data; ldst_decode dec_ldst; + logic dec_execute, dec_conditional, dec_undefined, dec_writeback, + dec_branch, dec_update_flags, dec_uses_rn; core_decode decode ( @@ -41,6 +42,7 @@ module arm810 .conditional(dec_conditional), .undefined(dec_undefined), .writeback(dec_writeback), + .uses_rn(dec_uses_rn), .branch(dec_branch), .update_flags(dec_update_flags), .branch_offset(dec_branch_offset), diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv index 653d896..1c20535 100644 --- a/rtl/core/control/control.sv +++ b/rtl/core/control/control.sv @@ -5,6 +5,7 @@ module core_control input logic clk, dec_execute, dec_conditional, + dec_uses_rn, dec_branch, dec_writeback, dec_update_flags, @@ -76,7 +77,7 @@ module core_control assign next_bubble = ((dec_update_flags || dec_conditional) && (final_update_flags || update_flags)) - || (final_writeback && (final_rd == dec_data.rn || final_rd == dec_snd.r)); + || (final_writeback && ((dec_uses_rn && final_rd == dec_data.rn) || final_rd == dec_snd.r)); core_control_ldst_pop ldst_pop ( diff --git a/rtl/core/decode/data.sv b/rtl/core/decode/data.sv index cb21f5e..103fb14 100644 --- a/rtl/core/decode/data.sv +++ b/rtl/core/decode/data.sv @@ -10,7 +10,8 @@ module core_decode_data snd_shift_by_reg_if_reg, writeback, update_flags, - restore_spsr + restore_spsr, + uses_rn ); alu_op op; @@ -35,6 +36,14 @@ module core_decode_data writeback = 1; endcase + unique case(op) + `ALU_MOV, `ALU_MVN: + uses_rn = 0; + + default: + uses_rn = 1; + endcase + update_flags = insn `FIELD_DATA_S; restore_spsr = (rd == `R15) & update_flags; diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv index 321e972..b2d9518 100644 --- a/rtl/core/decode/decode.sv +++ b/rtl/core/decode/decode.sv @@ -11,6 +11,7 @@ module core_decode undefined, writeback, update_flags, + uses_rn, branch, output ptr branch_offset, output snd_decode snd_ctrl, @@ -54,7 +55,7 @@ module core_decode data_decode data; logic data_writeback, data_update_flags, data_restore_spsr, - data_is_imm, data_shift_by_reg_if_reg; + data_is_imm, data_shift_by_reg_if_reg, data_uses_rn; core_decode_data group_data ( @@ -64,6 +65,7 @@ module core_decode .restore_spsr(data_restore_spsr), .snd_is_imm(data_is_imm), .snd_shift_by_reg_if_reg(data_shift_by_reg_if_reg), + .uses_rn(data_uses_rn), .* ); @@ -111,11 +113,12 @@ module core_decode ); always_comb begin - undefined = cond_undefined; - branch = 0; writeback = 0; update_flags = 0; + uses_rn = 1; + undefined = cond_undefined; + data_ctrl = {($bits(data_ctrl)){1'bx}}; snd_ctrl = {$bits(snd_ctrl){1'bx}}; @@ -145,6 +148,7 @@ module core_decode end `GROUP_ALU: begin + uses_rn = data_uses_rn; snd_is_imm = data_is_imm; snd_ror_if_imm = 1; snd_shift_by_reg_if_reg = data_shift_by_reg_if_reg; |