summaryrefslogtreecommitdiff
path: root/rtl/core
diff options
context:
space:
mode:
Diffstat (limited to 'rtl/core')
-rw-r--r--rtl/core/decode/decode.sv66
-rw-r--r--rtl/core/decode/mux.sv86
-rw-r--r--rtl/core/uarch.sv18
3 files changed, 85 insertions, 85 deletions
diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv
index 1e27878..ab8d2b9 100644
--- a/rtl/core/decode/decode.sv
+++ b/rtl/core/decode/decode.sv
@@ -9,36 +9,36 @@ module core_decode
output insn_decode dec
);
- mul_decode mul_ctrl;
- psr_decode psr_ctrl;
- snd_decode snd_ctrl;
- data_decode data_ctrl;
- ldst_decode ldst_ctrl;
- branch_decode branch_ctrl;
- coproc_decode coproc_ctrl;
- datapath_decode ctrl;
-
- assign dec.mul = mul_ctrl;
- assign dec.psr = psr_ctrl;
- assign dec.snd = snd_ctrl;
- assign dec.ctrl = ctrl;
- assign dec.data = data_ctrl;
- assign dec.ldst = ldst_ctrl;
- assign dec.branch = branch_ctrl;
- assign dec.coproc = coproc_ctrl;
-
- assign ctrl.execute = execute;
- assign ctrl.undefined = undefined;
- assign ctrl.conditional = conditional;
- assign ctrl.writeback = writeback;
- assign ctrl.branch = branch;
- assign ctrl.coproc = coproc;
- assign ctrl.ldst = ldst;
- assign ctrl.mul = mul;
-
- assign psr_ctrl.saved = spsr;
- assign psr_ctrl.write = psr_write;
- assign psr_ctrl.update_flags = update_flags;
+ mul_decode dec_mul;
+ psr_decode dec_psr;
+ snd_decode dec_snd;
+ ctrl_decode dec_ctrl;
+ data_decode dec_data;
+ ldst_decode dec_ldst;
+ branch_decode dec_branch;
+ coproc_decode dec_coproc;
+
+ assign dec.mul = dec_mul;
+ assign dec.psr = dec_psr;
+ assign dec.snd = dec_snd;
+ assign dec.ctrl = dec_ctrl;
+ assign dec.data = dec_data;
+ assign dec.ldst = dec_ldst;
+ assign dec.branch = dec_branch;
+ assign dec.coproc = dec_coproc;
+
+ assign dec_ctrl.execute = execute;
+ assign dec_ctrl.undefined = undefined;
+ assign dec_ctrl.conditional = conditional;
+ assign dec_ctrl.writeback = writeback;
+ assign dec_ctrl.branch = branch;
+ assign dec_ctrl.coproc = coproc;
+ assign dec_ctrl.ldst = ldst;
+ assign dec_ctrl.mul = mul;
+
+ assign dec_psr.saved = spsr;
+ assign dec_psr.write = psr_write;
+ assign dec_psr.update_flags = update_flags;
logic execute, undefined, conditional, writeback, update_flags,
branch, ldst, mul, coproc, spsr, psr_write;
@@ -80,7 +80,7 @@ module core_decode
core_decode_branch group_branch
(
.link(branch_link),
- .offset(branch_ctrl.offset),
+ .offset(dec_branch.offset),
.*
);
@@ -148,7 +148,7 @@ module core_decode
core_decode_mul group_mul
(
- .decode(mul_ctrl),
+ .decode(dec_mul),
.rd(mul_rd),
.rs(mul_rs),
.rm(mul_rm),
@@ -162,7 +162,7 @@ module core_decode
core_decode_coproc group_coproc
(
.rd(coproc_rd),
- .decode(coproc_ctrl),
+ .decode(dec_coproc),
.writeback(coproc_writeback),
.update_flags(coproc_update_flags),
.*
diff --git a/rtl/core/decode/mux.sv b/rtl/core/decode/mux.sv
index 65af9c6..643c942 100644
--- a/rtl/core/decode/mux.sv
+++ b/rtl/core/decode/mux.sv
@@ -37,7 +37,7 @@ module core_decode_mux
mul_rs,
mul_rm,
- input coproc_decode coproc_ctrl,
+ input coproc_decode dec_coproc,
input logic coproc_writeback,
coproc_update_flags,
input reg_num coproc_rd,
@@ -48,9 +48,9 @@ module core_decode_mux
input reg_num mrs_rd,
input msr_mask msr_fields,
- output snd_decode snd_ctrl,
- output data_decode data_ctrl,
- output ldst_decode ldst_ctrl,
+ output snd_decode dec_snd,
+ output data_decode dec_data,
+ output ldst_decode dec_ldst,
ldst_addr,
output logic execute,
undefined,
@@ -84,32 +84,32 @@ module core_decode_mux
psr_write = 0;
update_flags = 0;
- data_ctrl = {($bits(data_ctrl)){1'bx}};
- data_ctrl.uses_rn = 1;
+ dec_data = {($bits(dec_data)){1'bx}};
+ dec_data.uses_rn = 1;
- snd_ctrl = {$bits(snd_ctrl){1'bx}};
- snd_ctrl.shr = 0;
- snd_ctrl.ror = 0;
- snd_ctrl.is_imm = 1;
- snd_ctrl.shift_imm = {$bits(snd_ctrl.shift_imm){1'b0}};
- snd_ctrl.shift_by_reg = 0;
+ dec_snd = {$bits(dec_snd){1'bx}};
+ dec_snd.shr = 0;
+ dec_snd.ror = 0;
+ dec_snd.is_imm = 1;
+ dec_snd.shift_imm = {$bits(dec_snd.shift_imm){1'b0}};
+ dec_snd.shift_by_reg = 0;
snd_is_imm = 1'bx;
snd_ror_if_imm = 1'bx;
snd_shift_by_reg_if_reg = 1'bx;
ldst_addr = {($bits(ldst_addr)){1'bx}};
- ldst_ctrl = {($bits(ldst_ctrl)){1'bx}};
+ dec_ldst = {($bits(dec_ldst)){1'bx}};
// El orden de los casos es importante, NO CAMBIAR
priority casez(insn `FIELD_OP)
`GROUP_B: begin
branch = 1;
if(branch_link) begin
- data_ctrl.op = `ALU_SUB;
- data_ctrl.rd = `R14;
- data_ctrl.rn = `R15;
- snd_ctrl.imm = 12'd4;
+ dec_data.op = `ALU_SUB;
+ dec_data.rd = `R14;
+ dec_data.rn = `R15;
+ dec_snd.imm = 12'd4;
writeback = 1;
end
end
@@ -117,11 +117,11 @@ module core_decode_mux
`GROUP_MUL: begin
mul = 1;
- data_ctrl.rd = mul_rd;
- data_ctrl.rn = mul_rs;
+ dec_data.rd = mul_rd;
+ dec_data.rn = mul_rs;
- snd_ctrl.is_imm = 0;
- snd_ctrl.r = mul_rm;
+ dec_snd.is_imm = 0;
+ dec_snd.r = mul_rm;
writeback = 1;
update_flags = mul_update_flags;
@@ -132,8 +132,8 @@ module core_decode_mux
snd_ror_if_imm = 1;
snd_shift_by_reg_if_reg = data_shift_by_reg_if_reg;
- snd_ctrl = snd;
- data_ctrl = data;
+ dec_snd = snd;
+ dec_data = data;
writeback = data_writeback;
update_flags = data_update_flags;
@@ -148,8 +148,8 @@ module core_decode_mux
snd_ror_if_imm = 0;
snd_shift_by_reg_if_reg = 0;
- snd_ctrl = snd;
- ldst_ctrl = ldst_single;
+ dec_snd = snd;
+ dec_ldst = ldst_single;
ldst_addr = ldst_single;
undefined = undefined | snd_undefined;
@@ -158,12 +158,12 @@ module core_decode_mux
`GROUP_LDST_MISC_IMM, `GROUP_LDST_MISC_REG:
priority casez(insn `FIELD_OP)
`INSN_LDRB, `INSN_LDRSB, `INSN_LDRSH, `INSN_STRH: begin
- ldst_ctrl = ldst_misc;
+ dec_ldst = ldst_misc;
ldst_addr = ldst_misc;
- snd_ctrl.r = ldst_misc_off_reg;
- snd_ctrl.imm = {4'b0, ldst_misc_off_imm};
- snd_ctrl.is_imm = !ldst_misc_off_is_reg;
+ dec_snd.r = ldst_misc_off_reg;
+ dec_snd.imm = {4'b0, ldst_misc_off_imm};
+ dec_snd.is_imm = !ldst_misc_off_is_reg;
end
default:
@@ -171,9 +171,9 @@ module core_decode_mux
endcase
`GROUP_LDST_MULT: begin
- ldst_ctrl = ldst_multiple;
+ dec_ldst = ldst_multiple;
ldst_addr = ldst_multiple;
- snd_ctrl.imm = 12'd4;
+ dec_snd.imm = 12'd4;
restore_spsr = ldst_mult_restore_spsr;
end
@@ -183,15 +183,15 @@ module core_decode_mux
writeback = coproc_writeback;
update_flags = coproc_update_flags;
- data_ctrl.op = `ALU_MOV;
- data_ctrl.rn = coproc_rd;
- data_ctrl.rd = coproc_rd;
- data_ctrl.uses_rn = coproc_ctrl.load;
+ dec_data.op = `ALU_MOV;
+ dec_data.rn = coproc_rd;
+ dec_data.rd = coproc_rd;
+ dec_data.uses_rn = dec_coproc.load;
end
`INSN_MRS: begin
- snd_ctrl.is_imm = 0;
- snd_ctrl.r = mrs_rd;
+ dec_snd.is_imm = 0;
+ dec_snd.r = mrs_rd;
writeback = 1;
conditional = 1;
@@ -202,7 +202,7 @@ module core_decode_mux
snd_ror_if_imm = 1;
snd_shift_by_reg_if_reg = 0;
- snd_ctrl = snd;
+ dec_snd = snd;
conditional = 1;
end
@@ -219,8 +219,8 @@ module core_decode_mux
`GROUP_LDST_SINGLE, `GROUP_LDST_MISC, `GROUP_LDST_MULT: begin
ldst = 1;
- data_ctrl = data_ldst;
- writeback = ldst_ctrl.writeback || ldst_ctrl.load;
+ dec_data = data_ldst;
+ writeback = dec_ldst.writeback || dec_ldst.load;
end
default: ;
@@ -237,9 +237,9 @@ module core_decode_mux
conditional = 1'bx;
update_flags = 1'bx;
- snd_ctrl = {($bits(snd_ctrl)){1'bx}};
- data_ctrl = {($bits(data_ctrl)){1'bx}};
- ldst_ctrl = {($bits(ldst_ctrl)){1'bx}};
+ dec_snd = {($bits(dec_snd)){1'bx}};
+ dec_data = {($bits(dec_data)){1'bx}};
+ dec_ldst = {($bits(dec_ldst)){1'bx}};
end
end
diff --git a/rtl/core/uarch.sv b/rtl/core/uarch.sv
index 1d43caf..5b88559 100644
--- a/rtl/core/uarch.sv
+++ b/rtl/core/uarch.sv
@@ -88,7 +88,7 @@ typedef struct packed
coproc,
ldst,
mul;
-} datapath_decode;
+} ctrl_decode;
typedef struct packed
{
@@ -171,14 +171,14 @@ typedef struct packed
typedef struct packed
{
- datapath_decode ctrl;
- psr_decode psr;
- branch_decode branch;
- snd_decode snd;
- data_decode data;
- ldst_decode ldst;
- mul_decode mul;
- coproc_decode coproc;
+ ctrl_decode ctrl;
+ psr_decode psr;
+ branch_decode branch;
+ snd_decode snd;
+ data_decode data;
+ ldst_decode ldst;
+ mul_decode mul;
+ coproc_decode coproc;
} insn_decode;
typedef enum