diff options
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/control/data.sv | 30 |
1 files changed, 14 insertions, 16 deletions
diff --git a/rtl/core/control/data.sv b/rtl/core/control/data.sv index 5fa6db9..320747f 100644 --- a/rtl/core/control/data.sv +++ b/rtl/core/control/data.sv @@ -15,7 +15,6 @@ module core_control_data input ctrl_cycle cycle, next_cycle, - input logic issue, input ptr pc, input word mem_offset, input psr_flags flags, @@ -66,21 +65,20 @@ module core_control_data always_ff @(posedge clk) unique case(next_cycle) - ISSUE: - if(issue) begin - alu <= dec_data.op; - c_in <= flags.c; - - data_snd_is_imm <= dec_snd.is_imm; - data_snd_shift_by_reg <= dec_snd.shift_by_reg; - data_imm <= dec_snd.imm; - data_shift_imm <= dec_snd.shift_imm; - - shifter.shr <= dec_snd.shr; - shifter.ror <= dec_snd.ror; - shifter.put_carry <= dec_snd.put_carry; - shifter.sign_extend <= dec_snd.sign_extend; - end + ISSUE: begin + alu <= dec_data.op; + c_in <= flags.c; + + data_snd_is_imm <= dec_snd.is_imm; + data_snd_shift_by_reg <= dec_snd.shift_by_reg; + data_imm <= dec_snd.imm; + data_shift_imm <= dec_snd.shift_imm; + + shifter.shr <= dec_snd.shr; + shifter.ror <= dec_snd.ror; + shifter.put_carry <= dec_snd.put_carry; + shifter.sign_extend <= dec_snd.sign_extend; + end RD_INDIRECT_SHIFT: begin saved_base <= rd_value_b; |