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Diffstat (limited to 'rtl/cache/routing.sv')
| -rw-r--r-- | rtl/cache/routing.sv | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/rtl/cache/routing.sv b/rtl/cache/routing.sv index c72d9b5..8f744dd 100644 --- a/rtl/cache/routing.sv +++ b/rtl/cache/routing.sv @@ -48,6 +48,7 @@ module cache_routing BYPASS } state; + //Arbitrar el bus del lado de la cache assign cached = io == 3'b000; assign cache_mem = cache_mem_read || cache_mem_write; @@ -61,6 +62,7 @@ module cache_routing always_comb begin transition = 0; core_waitrequest = cache_core_waitrequest; + // Desde el punto de vista de cache, mem le hace waitreq a cache cache_mem_waitrequest = 1; unique case (state) |