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-rw-r--r--rtl/cache/cache_control.sv2
1 files changed, 1 insertions, 1 deletions
diff --git a/rtl/cache/cache_control.sv b/rtl/cache/cache_control.sv
index b31b6a8..64b4ce1 100644
--- a/rtl/cache/cache_control.sv
+++ b/rtl/cache/cache_control.sv
@@ -80,7 +80,7 @@ module cache_control
assign mem_end = (mem_read || mem_write) && !mem_waitrequest;
assign mem_wait = (mem_read || mem_write) && mem_waitrequest;
- assign mem_address = {3'b000, mem_tag, mem_index, 4'b0000};
+ assign mem_address = {`IO_CACHED, mem_tag, mem_index, 4'b0000};
assign mem_read_end = mem_read && !mem_waitrequest;
/* Desbloquear la lĂ­nea hasta que la request del core termine garantiza