diff options
| -rw-r--r-- | gfx_hw.tcl | 1 | ||||
| -rw-r--r-- | rtl/gfx/gfx_defs.sv | 2 | ||||
| -rw-r--r-- | rtl/gfx/gfx_sp.sv | 13 | ||||
| -rw-r--r-- | rtl/gfx/gfx_sp_combiner.sv | 63 | ||||
| -rw-r--r-- | rtl/gfx/gfx_sp_shuffler.sv | 4 |
5 files changed, 81 insertions, 2 deletions
@@ -88,6 +88,7 @@ add_fileset_file gfx_sp_decode.sv SYSTEM_VERILOG PATH rtl/gfx/gfx_sp_decode.sv add_fileset_file gfx_sp_select.sv SYSTEM_VERILOG PATH rtl/gfx/gfx_sp_select.sv add_fileset_file gfx_sp_widener.sv SYSTEM_VERILOG PATH rtl/gfx/gfx_sp_widener.sv add_fileset_file gfx_sp_swizzle.sv SYSTEM_VERILOG PATH rtl/gfx/gfx_sp_swizzle.sv +add_fileset_file gfx_sp_combiner.sv SYSTEM_VERILOG PATH rtl/gfx/gfx_sp_combiner.sv add_fileset_file gfx_sp_shuffler.sv SYSTEM_VERILOG PATH rtl/gfx/gfx_sp_shuffler.sv diff --git a/rtl/gfx/gfx_defs.sv b/rtl/gfx/gfx_defs.sv index 0a4a5da..260b17a 100644 --- a/rtl/gfx/gfx_defs.sv +++ b/rtl/gfx/gfx_defs.sv @@ -255,4 +255,6 @@ typedef struct packed mat4 data; } wb_op; +`define GFX_SP_COMBINER_FIFO_DEPTH 4 // TODO: optimizar esto + `endif diff --git a/rtl/gfx/gfx_sp.sv b/rtl/gfx/gfx_sp.sv index a65bd6e..acb1dc2 100644 --- a/rtl/gfx/gfx_sp.sv +++ b/rtl/gfx/gfx_sp.sv @@ -64,6 +64,19 @@ module gfx_sp .* ); + gfx_sp_combiner combiner + ( + .a(), + .b(), + .wb(), + .deco(), + .in_ready(), + .in_valid(0), + .wb_ready(1), + .wb_valid(), + .* + ); + logic batch_end, deco_ready; assign deco_ready = 1; diff --git a/rtl/gfx/gfx_sp_combiner.sv b/rtl/gfx/gfx_sp_combiner.sv new file mode 100644 index 0000000..e5e64c3 --- /dev/null +++ b/rtl/gfx/gfx_sp_combiner.sv @@ -0,0 +1,63 @@ +`include "gfx/gfx_defs.sv" + +module gfx_sp_combiner +( + input logic clk, + rst_n, + + input insn_deco deco, + input mat4 a, + b, + input logic in_valid, + output logic in_ready, + + output wb_op wb, + input logic wb_ready, + output logic wb_valid +); + + wb_op wb_out; + logic mul_ready, mul_valid, fifo_ready, fifo_valid, skid_ready, out_stall; + + assign in_ready = mul_ready && fifo_ready; + + gfx_mat_mat mul + ( + .q(wb_out.data), + .in_ready(mul_ready), + .in_valid(in_valid && fifo_ready), + .out_ready(skid_ready && fifo_valid), + .out_valid(mul_valid), + .* + ); + + gfx_fifo #(.WIDTH($bits(vreg_num)), .DEPTH(`GFX_SP_COMBINER_FIFO_DEPTH)) depth + ( + .in(deco.dst), + .out(wb_out.dst), + .in_ready(fifo_ready), + .in_valid(in_valid && mul_ready), + .out_ready(skid_ready && mul_valid), + .out_valid(fifo_valid), + .* + ); + + gfx_skid_flow out_flow + ( + .stall(out_stall), + .in_ready(skid_ready), + .in_valid(fifo_valid && mul_valid), + .out_ready(wb_ready), + .out_valid(wb_valid), + .* + ); + + gfx_skid_buf #(.WIDTH($bits(wb))) out_skid + ( + .in(wb_out), + .out(wb), + .stall(out_stall), + .* + ); + +endmodule diff --git a/rtl/gfx/gfx_sp_shuffler.sv b/rtl/gfx/gfx_sp_shuffler.sv index e4c119d..627bf8a 100644 --- a/rtl/gfx/gfx_sp_shuffler.sv +++ b/rtl/gfx/gfx_sp_shuffler.sv @@ -37,7 +37,7 @@ module gfx_sp_shuffler genvar gen_i; generate - for (gen_i = 0; gen_i < `VECS_PER_MAT; ++gen_i) begin: lanes + for (gen_i = 0; gen_i < `GFX_SP_LANES; ++gen_i) begin: lanes gfx_sp_select select ( .a(a[gen_i]), @@ -63,7 +63,7 @@ module gfx_sp_shuffler is_swizzle <= deco.shuffler.is_swizzle; wb_out.dst <= hold_dst; - for (integer i = 0; i < `VECS_PER_MAT; ++i) + for (integer i = 0; i < `GFX_SP_LANES; ++i) wb_out.data[i] <= is_swizzle ? swizzle_out[i] : select_out[i]; end |