diff options
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/decode/isa.sv | 3 | ||||
| -rw-r--r-- | rtl/core/decode/mux.sv | 14 | ||||
| -rw-r--r-- | tb/sim/stack.S | 2 |
3 files changed, 18 insertions, 1 deletions
diff --git a/rtl/core/decode/isa.sv b/rtl/core/decode/isa.sv index 1273a8b..7c27f49 100644 --- a/rtl/core/decode/isa.sv +++ b/rtl/core/decode/isa.sv @@ -48,6 +48,9 @@ `define INSN_B 28'b101_0_???????????????????????? `define INSN_BL 28'b101_1_???????????????????????? +// Esto no es parte de ARMv4, pero U-boot tiene algunos `bx lr` hard-coded +`define INSN_BXLR 28'h12fff1e + `define GROUP_B 28'b101_?_???????????????????????? `define FIELD_B_L [24] diff --git a/rtl/core/decode/mux.sv b/rtl/core/decode/mux.sv index 51fe14b..3f613a4 100644 --- a/rtl/core/decode/mux.sv +++ b/rtl/core/decode/mux.sv @@ -216,6 +216,20 @@ module core_decode_mux /*`GROUP_SWP: ; `INSN_SWI: ;*/ + /* No es parte de ARMv4 pero U-Boot lo necesita. esto se + * decodifica igual que `mov pc, lr` ya que no tenemos Thumb. + */ + `INSN_BXLR: begin + dec_data.op = `ALU_MOV; + dec_data.rd = `R15; + dec_data.uses_rn = 0; + + dec_snd.r = `R14; + dec_snd.is_imm = 0; + + writeback = 1; + end + default: undefined = 1; endcase diff --git a/tb/sim/stack.S b/tb/sim/stack.S index f1bc0a8..490f1d6 100644 --- a/tb/sim/stack.S +++ b/tb/sim/stack.S @@ -17,4 +17,4 @@ stub2: mov r4, sp pop {lr} mov r5, sp - mov pc, lr + bx lr |