diff options
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/arm810.sv | 4 | ||||
| -rw-r--r-- | rtl/core/control/control.sv | 3 | ||||
| -rw-r--r-- | rtl/core/decode/data.sv | 6 | ||||
| -rw-r--r-- | rtl/core/decode/decode.sv | 8 | ||||
| -rw-r--r-- | rtl/core/uarch.sv | 1 |
5 files changed, 9 insertions, 13 deletions
diff --git a/rtl/core/arm810.sv b/rtl/core/arm810.sv index c0d5750..f804061 100644 --- a/rtl/core/arm810.sv +++ b/rtl/core/arm810.sv @@ -33,8 +33,7 @@ module arm810 snd_decode dec_snd; data_decode dec_data; ldst_decode dec_ldst; - logic dec_execute, dec_conditional, dec_undefined, dec_writeback, - dec_update_flags, dec_uses_rn; + logic dec_execute, dec_conditional, dec_undefined, dec_writeback, dec_update_flags; core_decode decode ( @@ -42,7 +41,6 @@ module arm810 .conditional(dec_conditional), .undefined(dec_undefined), .writeback(dec_writeback), - .uses_rn(dec_uses_rn), .update_flags(dec_update_flags), .branch_ctrl(dec_branch), .snd_ctrl(dec_snd), diff --git a/rtl/core/control/control.sv b/rtl/core/control/control.sv index 81e7257..238b353 100644 --- a/rtl/core/control/control.sv +++ b/rtl/core/control/control.sv @@ -6,7 +6,6 @@ module core_control dec_execute, dec_undefined, dec_conditional, - dec_uses_rn, dec_writeback, dec_update_flags, input branch_decode dec_branch, @@ -84,7 +83,7 @@ module core_control assign next_bubble = (final_writeback && final_rd == `R15) || ((dec_update_flags || dec_conditional) && (final_update_flags || update_flags)) - || (final_writeback && ((dec_uses_rn && (final_rd == dec_data.rn || dec_data.rn == `R15)) + || (final_writeback && ((dec_data.uses_rn && (final_rd == dec_data.rn || dec_data.rn == `R15)) || final_rd == dec_snd.r || dec_snd.r == `R15)); core_control_ldst_pop ldst_pop diff --git a/rtl/core/decode/data.sv b/rtl/core/decode/data.sv index 103fb14..1bd7ef9 100644 --- a/rtl/core/decode/data.sv +++ b/rtl/core/decode/data.sv @@ -10,16 +10,18 @@ module core_decode_data snd_shift_by_reg_if_reg, writeback, update_flags, - restore_spsr, - uses_rn + restore_spsr ); alu_op op; reg_num rn, rd; + logic uses_rn; assign decode.op = op; assign decode.rn = rn; assign decode.rd = rd; + assign decode.uses_rn = uses_rn; + assign rn = insn `FIELD_DATA_RN; assign rd = insn `FIELD_DATA_RD; assign op = insn `FIELD_DATA_OPCODE; diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv index cd3ee53..da244c1 100644 --- a/rtl/core/decode/decode.sv +++ b/rtl/core/decode/decode.sv @@ -11,7 +11,6 @@ module core_decode undefined, writeback, update_flags, - uses_rn, output branch_decode branch_ctrl, output snd_decode snd_ctrl, output data_decode data_ctrl, @@ -56,7 +55,7 @@ module core_decode data_decode data; logic data_writeback, data_update_flags, data_restore_spsr, - data_is_imm, data_shift_by_reg_if_reg, data_uses_rn; + data_is_imm, data_shift_by_reg_if_reg; core_decode_data group_data ( @@ -66,7 +65,6 @@ module core_decode .restore_spsr(data_restore_spsr), .snd_is_imm(data_is_imm), .snd_shift_by_reg_if_reg(data_shift_by_reg_if_reg), - .uses_rn(data_uses_rn), .* ); @@ -117,11 +115,11 @@ module core_decode branch = 0; writeback = 0; update_flags = 0; - uses_rn = 1; execute = cond_execute; undefined = cond_undefined; data_ctrl = {($bits(data_ctrl)){1'bx}}; + data_ctrl.uses_rn = 1; snd_ctrl = {$bits(snd_ctrl){1'bx}}; snd_ctrl.shr = 0; @@ -152,7 +150,6 @@ module core_decode end `GROUP_ALU: begin - uses_rn = data_uses_rn; snd_is_imm = data_is_imm; snd_ror_if_imm = 1; snd_shift_by_reg_if_reg = data_shift_by_reg_if_reg; @@ -227,7 +224,6 @@ module core_decode execute = 0; branch = 1'bx; - uses_rn = 1'bx; writeback = 1'bx; conditional = 1'bx; update_flags = 1'bx; diff --git a/rtl/core/uarch.sv b/rtl/core/uarch.sv index 1574895..d1bdce8 100644 --- a/rtl/core/uarch.sv +++ b/rtl/core/uarch.sv @@ -62,6 +62,7 @@ typedef struct packed alu_op op; reg_num rn, rd; + logic uses_rn; } data_decode; typedef struct packed |