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-rw-r--r--tb/models/smp.py29
-rw-r--r--tb/top/test_smp.py12
2 files changed, 31 insertions, 10 deletions
diff --git a/tb/models/smp.py b/tb/models/smp.py
index a6439f8..c5bb760 100644
--- a/tb/models/smp.py
+++ b/tb/models/smp.py
@@ -2,16 +2,23 @@ __all__ = ['SmpModel']
class SmpModel:
def __init__(self):
- self._pe0 = SmpPe(0)
- self._pe1 = SmpPe(1)
- self._pe2 = SmpPe(1)
- self._pe3 = SmpPe(1)
+ self._pes = [
+ SmpPe(0),
+ SmpPe(1),
+ SmpPe(1),
+ SmpPe(1)]
def read(self):
- return self._pe0.read() \
- | self._pe1.read() << 8 \
- | self._pe2.read() << 16 \
- | self._pe3.read() << 24
+ return self._pes[0].read() \
+ | self._pes[1].read() << 8 \
+ | self._pes[2].read() << 16 \
+ | self._pes[3].read() << 24
+
+ def halt(self, cpu):
+ self._pes[cpu].halt()
+
+ def run(self, cpu):
+ self._pes[cpu].run()
class SmpPe:
def __init__(self, halt_on_reset):
@@ -20,3 +27,9 @@ class SmpPe:
def read(self):
return self._bkpt << 1 | self._halted
+
+ def halt(self):
+ self._halted = 1
+
+ def run(self):
+ self._halted = 0
diff --git a/tb/top/test_smp.py b/tb/top/test_smp.py
index 5960373..a3cb61f 100644
--- a/tb/top/test_smp.py
+++ b/tb/top/test_smp.py
@@ -6,7 +6,7 @@ from cocotb_bus.drivers.avalon import AvalonMaster
from tb.models import CorePaceModel, SmpModel
@cocotb.test()
-async def reset(dut):
+async def bring_up(dut):
await cocotb.start(Clock(dut.clk, 2).start())
dut.rst_n.value = 1
@@ -39,5 +39,13 @@ async def reset(dut):
[dut.cpu_halted_1, dut.cpu_halted_2, dut.cpu_halted_3])),
50)
- await ClockCycles(dut.clk, 5)
+ await ClockCycles(dut.clk, 10)
+ assert await master.read(0) == model.read()
+
+ await master.write(0, 0x01000102)
+ model.halt(0)
+ model.run(1)
+ model.run(3)
+
+ await ClockCycles(dut.clk, 10)
assert await master.read(0) == model.read()