tb: add test: fifo

1 files changed, 56 insertions, 0 deletions

diff --git a/tb/top/test_fifo.py b/tb/top/test_fifo.py
new file mode 100644
index 0000000..259d03d
--- /dev/null
+++ b/tb/top/test_fifo.py
@@ -0,0 +1,56 @@
+import itertools
+
+import cocotb
+from cocotb.clock import Clock
+from cocotb.triggers import ClockCycles, RisingEdge, Timer
+from cocotb_bus.drivers import BitDriver
+
+@cocotb.test()
+async def fifo(dut):
+    await cocotb.start(Clock(dut.clk, 2).start())
+
+    dut.in_valid.value = 0
+    dut.out_ready.value = 0
+
+    dut.rst_n.value = 1
+    await Timer(1)
+    dut.rst_n.value = 0
+    await Timer(1)
+    dut.rst_n.value = 1
+
+    async def send():
+        in_ = getattr(dut, 'in')
+        in_ready = dut.in_ready
+        in_valid = dut.in_valid
+
+        val = 0
+        while True:
+            in_.value = val
+            await RisingEdge(dut.clk)
+            if in_valid.value and in_ready.value:
+                val = (val + 1) & 0xff
+
+    async def recv():
+        out = dut.out
+        out_ready = dut.out_ready
+        out_valid = dut.out_valid
+
+        val = 0
+        while True:
+            await RisingEdge(dut.clk)
+            if out_valid.value and out_ready.value:
+                assert out.value == val, f'expected {val}, got {out.value.integer}'
+                val = (val + 1) & 0xff
+
+    await cocotb.start(send())
+    await cocotb.start(recv())
+
+    await ClockCycles(dut.clk, 2)
+
+    ready_driver = BitDriver(dut.out_ready, dut.clk)
+    valid_driver = BitDriver(dut.in_valid, dut.clk)
+
+    ready_driver.start((1, i % 5) for i in itertools.count())
+    valid_driver.start((1 + (i % 2), (i + 1) % 3) for i in itertools.count())
+
+    await ClockCycles(dut.clk, 1 << 16)