diff options
| author | Alejandro Soto <alejandro@34project.org> | 2023-10-06 21:06:20 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2023-10-06 21:06:20 -0600 |
| commit | 363cbe7aea99400c25a6006bf5b28338cdadc611 (patch) | |
| tree | 00dafef54a2d0b51f704134022dc1c7698756727 /tb/top/test_smp.py | |
| parent | f786c0f2f6f00cab2203de4a672801ca9c179415 (diff) | |
tb: implement ring test
Diffstat (limited to '')
| -rw-r--r-- | tb/top/test_smp.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tb/top/test_smp.py b/tb/top/test_smp.py index 1994da2..c70b76b 100644 --- a/tb/top/test_smp.py +++ b/tb/top/test_smp.py @@ -7,6 +7,8 @@ from tb.models import CorePaceModel, SmpModel @cocotb.test() async def reset(dut): + cocotb.start(Clock(dut.clk, 2).start()) + dut.rst_n.value = 1 await Timer(1) dut.rst_n.value = 0 @@ -14,8 +16,6 @@ async def reset(dut): dut.rst_n.value = 1 model = SmpModel() - - cocotb.start_soon(Clock(dut.clk, 2).start()) master = AvalonMaster(dut, 'avl', dut.clk, case_insensitive=False) cpu0 = CorePaceModel(clk=dut.clk, halt=dut.halt_0, step=dut.step_0, |
