diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-12-11 23:54:38 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-12-16 16:29:10 -0600 |
| commit | 79e05aa7f0ccce6eb26248ddef3e928727857a9c (patch) | |
| tree | 8c67d6532234dac0eace7f005638efc8441105a5 /tb/sim | |
| parent | 0284628a47d5b4797c89f6846b9efee3f1243b94 (diff) | |
Implement prefetch aborts
Diffstat (limited to '')
| -rw-r--r-- | tb/sim/paging.S | 22 | ||||
| -rw-r--r-- | tb/sim/paging.py | 1 |
2 files changed, 15 insertions, 8 deletions
diff --git a/tb/sim/paging.S b/tb/sim/paging.S index e67e163..848bc61 100644 --- a/tb/sim/paging.S +++ b/tb/sim/paging.S @@ -1,11 +1,3 @@ -.global data_abort -data_abort: - mrc p15, 0, r2, c6, c0, 0 - mrc p15, 0, r3, c5, c0, 0 - # Domain field is invalid for section translation faults - and r3, r3, #0b1111 - mov pc, r4 - .global reset reset: # Copy code to page 3 @@ -55,3 +47,17 @@ reset: mov r5, lr # This triggers a page fault ldr r4, [r6] + +.global data_abort +data_abort: + mrc p15, 0, r2, c6, c0, 0 + mrc p15, 0, r3, c5, c0, 0 + # Domain field is invalid for section translation faults + and r3, r3, #0b1111 + # Results in a prefetch abort + mov pc, r2 + +.global prefetch_abort +prefetch_abort: + mov r6, lr + mov pc, r4 diff --git a/tb/sim/paging.py b/tb/sim/paging.py index e687051..b34e76a 100644 --- a/tb/sim/paging.py +++ b/tb/sim/paging.py @@ -6,3 +6,4 @@ def final(): assert_reg(r2, 0x89abcde0) assert_reg(r3, 0b0101) # Section translation fault, p. 720 assert_reg(r4, read_reg(r5)) + assert_reg(r6, 0x89abcde4) |