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authorAlejandro Soto <alejandro@34project.org>2022-11-17 08:17:04 -0600
committerAlejandro Soto <alejandro@34project.org>2022-11-17 08:53:38 -0600
commit3b62a23705e93f3786402157fc95fd256d850041 (patch)
treebccc8e2a835fccaee23804fe2028ee05efa454ae /tb/sim/sim.py
parent61bf2100fbd5e0a5f4bd1f013d70d8027604bbba (diff)
Implement sim test: descifrador
Diffstat (limited to 'tb/sim/sim.py')
-rwxr-xr-xtb/sim/sim.py6
1 files changed, 6 insertions, 0 deletions
diff --git a/tb/sim/sim.py b/tb/sim/sim.py
index 0c8b023..b14e0fd 100755
--- a/tb/sim/sim.py
+++ b/tb/sim/sim.py
@@ -261,6 +261,12 @@ for rng in mem_dumps:
for r, value in init_regs.items():
exec_args.extend(['--init-reg', f'{r}={value}'])
+for addr, const in module_get('consts', {}).items():
+ exec_args.extend(['--const', f'{addr},{const}'])
+
+for addr, filename in module_get('loads', {}).items():
+ exec_args.extend(['--load', f'{addr},{filename}'])
+
init_regs = None
exec_args.append(image)