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authorAlejandro Soto <alejandro@34project.org>2022-09-27 15:13:10 -0600
committerAlejandro Soto <alejandro@34project.org>2022-09-27 15:13:10 -0600
commit583a1ebaafe285c223afbfcc60bb68e6c10174ca (patch)
tree45931e6c7112468b172be55caa17739f2ad2c9bb /rtl
parent7fe23c697af81c08b69c0b30f1db48ed16493662 (diff)
Add simple loop execution testbench
Diffstat (limited to 'rtl')
-rw-r--r--rtl/top/conspiracion.sv6
1 files changed, 1 insertions, 5 deletions
diff --git a/rtl/top/conspiracion.sv b/rtl/top/conspiracion.sv
index 79e8bb8..50b9cd8 100644
--- a/rtl/top/conspiracion.sv
+++ b/rtl/top/conspiracion.sv
@@ -16,11 +16,7 @@ module conspiracion
inout wire memory_mem_dqs_n,
output wire memory_mem_odt,
output wire memory_mem_dm,
- input wire memory_oct_rzqin,
-
- input logic dir, clr, mov, add, io,
- output logic[7:0] out,
- output logic done
+ input wire memory_oct_rzqin
);
//TODO