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authorAlejandro Soto <alejandro@34project.org>2022-11-08 21:07:14 -0600
committerAlejandro Soto <alejandro@34project.org>2022-11-08 21:07:14 -0600
commitd84b1ef6335007feef8cfa6e4849741d13f015e9 (patch)
tree464b9ead62423cd0890f4300e88d2f3b15650b3e /rtl
parent13b112dcb8f67778c6a140cb5ce8f1ab21aa6fb9 (diff)
Add missing toplevel pin connections
Diffstat (limited to 'rtl')
-rw-r--r--rtl/top/conspiracion.sv10
1 files changed, 5 insertions, 5 deletions
diff --git a/rtl/top/conspiracion.sv b/rtl/top/conspiracion.sv
index cd062ff..5261308 100644
--- a/rtl/top/conspiracion.sv
+++ b/rtl/top/conspiracion.sv
@@ -1,6 +1,7 @@
module conspiracion
(
input wire clk_clk,
+ input wire debug,
output wire [12:0] memory_mem_a,
output wire [2:0] memory_mem_ba,
output wire memory_mem_ck,
@@ -17,6 +18,7 @@ module conspiracion
output wire memory_mem_odt,
output wire memory_mem_dm,
input wire memory_oct_rzqin,
+ output wire vram_wire_clk,
output wire [12:0] vram_wire_addr,
output wire [1:0] vram_wire_ba,
output wire vram_wire_cas_n,
@@ -26,6 +28,7 @@ module conspiracion
output wire [1:0] vram_wire_dqm,
output wire vram_wire_ras_n,
output wire vram_wire_we_n,
+ output wire [7:0] pio_leds,
output wire vga_controller_0_dac_clk,
output wire vga_controller_0_dac_hsync,
output wire vga_controller_0_dac_vsync,
@@ -56,9 +59,6 @@ module conspiracion
.*
);
- //TODO: pio_0_external_connection_export,
- //TODO: pll_0_outclk3_clk,
-
platform plat
(
.master_0_core_cpu_clk(cpu_clk),
@@ -69,8 +69,8 @@ module conspiracion
.master_0_core_write(write),
.master_0_core_start(start),
.master_0_core_irq(irq),
- .pll_0_outclk3_clk(),
- .pio_0_external_connection_export(),
+ .pll_0_outclk3_clk(vram_wire_clk),
+ .pio_0_external_connection_export(pio_leds),
.*
);