Implement decode for mrs, msr

5 files changed, 87 insertions, 15 deletions

diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv
index 850ddd0..b6c6cbd 100644
--- a/rtl/core/decode/decode.sv
+++ b/rtl/core/decode/decode.sv
@@ -146,6 +146,29 @@ module core_decode
 		.*
 	);
 
+	//TODO
+	logic mrs_spsr;
+	reg_num mrs_rd;
+
+	core_decode_mrs group_mrs
+	(
+		.rd(mrs_rd),
+		.spsr(mrs_spsr),
+		.*
+	);
+
+	//TODO
+	logic msr_spsr, msr_is_imm;
+	msr_mask msr_fields;
+
+	core_decode_msr group_msr
+	(
+		.spsr(msr_spsr),
+		.fields(msr_fields),
+		.snd_is_imm(msr_is_imm),
+		.*
+	);
+
 	always_comb begin
 		mul = 0;
 		ldst = 0;
@@ -195,7 +218,6 @@ module core_decode
 
 				snd_ctrl.is_imm = 0;
 				snd_ctrl.r = mul_rm;
-				snd_ctrl.shift_by_reg = 0;
 
 				writeback = 1;
 				update_flags = mul_update_flags;
@@ -261,12 +283,28 @@ module core_decode
 				data_ctrl.uses_rn = coproc_ctrl.load;
 			end
 
+			`INSN_MRS: begin
+				snd_ctrl.is_imm = 0;
+				snd_ctrl.r = mrs_rd;
+
+				writeback = 1;
+				conditional = 1;
+			end
+
+			`GROUP_MSR: begin
+				snd_is_imm = msr_is_imm;
+				snd_ror_if_imm = 1;
+				snd_shift_by_reg_if_reg = 0;
+
+				snd_ctrl = snd;
+				conditional = 1;
+			end
+
 			/*`GROUP_SWP: ;
-			`INSN_MRS: ;
-			`GROUP_MSR: ;
 			`INSN_SWI: ;*/
 
-			default: undefined = 1;
+			default:
+				undefined = 1;
 		endcase
 
 		unique casez(insn `FIELD_OP)
diff --git a/rtl/core/decode/isa.sv b/rtl/core/decode/isa.sv
index e69d79f..4bd2dea 100644
--- a/rtl/core/decode/isa.sv
+++ b/rtl/core/decode/isa.sv
@@ -190,17 +190,11 @@
 
 `define GROUP_MSR 28'b0_0_?_1_0_?_1_0_????_1111_0000_0000_????
 
-`define FIELD_MRS_R      [24]
-`define FIELD_MRS_RD     [15:12]
-`define FIELD_MSR_I      [25]
-`define FIELD_MSR_R      [22]
-`define FIELD_MSR_F      [19]
-`define FIELD_MSR_S      [18]
-`define FIELD_MSR_X      [17]
-`define FIELD_MSR_C      [16]
-`define FIELD_MSR_ROTATE [11:8]
-`define FIELD_MSR_IMM    [7:0]
-`define FIELD_MSR_RM     [3:0]
+`define FIELD_MRS_R    [24]
+`define FIELD_MRS_RD   [15:12]
+`define FIELD_MSR_I    [25]
+`define FIELD_MSR_R    [22]
+`define FIELD_MSR_MASK [19:16]
 
 // System call
 
diff --git a/rtl/core/decode/mrs.sv b/rtl/core/decode/mrs.sv
new file mode 100644
index 0000000..05018cd
--- /dev/null
+++ b/rtl/core/decode/mrs.sv
@@ -0,0 +1,15 @@
+`include "core/decode/isa.sv"
+`include "core/uarch.sv"
+
+module core_decode_mrs
+(
+	input  word    insn,
+
+	output reg_num rd,
+	output logic   spsr
+);
+
+	assign rd = insn `FIELD_MRS_RD;
+	assign spsr = insn `FIELD_MRS_R;
+
+endmodule
diff --git a/rtl/core/decode/msr.sv b/rtl/core/decode/msr.sv
new file mode 100644
index 0000000..c3f0e3d
--- /dev/null
+++ b/rtl/core/decode/msr.sv
@@ -0,0 +1,17 @@
+`include "core/decode/isa.sv"
+`include "core/uarch.sv"
+
+module core_decode_msr
+(
+	input  word     insn,
+
+	output msr_mask fields,
+	output logic    spsr,
+	                snd_is_imm
+);
+
+	assign spsr = insn `FIELD_MSR_R;
+	assign fields = insn `FIELD_MSR_MASK;
+	assign snd_is_imm = insn `FIELD_MSR_I;
+
+endmodule
diff --git a/rtl/core/uarch.sv b/rtl/core/uarch.sv
index 80863c3..6ef5a76 100644
--- a/rtl/core/uarch.sv
+++ b/rtl/core/uarch.sv
@@ -59,6 +59,14 @@ typedef struct packed
 	      f;
 } psr_intmask;
 
+typedef struct packed
+{
+	logic f,
+	      s,
+	      x,
+	      c;
+} msr_mask;
+
 typedef logic[4:0] psr_mode;
 
 `define MODE_USR 5'b10000