rtl/gfx: implement memory interface

3 files changed, 82 insertions, 13 deletions

diff --git a/rtl/gfx/gfx.sv b/rtl/gfx/gfx.sv
index e708e8d..fef08a7 100644
--- a/rtl/gfx/gfx.sv
+++ b/rtl/gfx/gfx.sv
@@ -100,7 +100,9 @@ module gfx
 		.*
 	);
 
-	logic rop_mask_assert, rop_ready;
+	logic rop_mask_assert, rop_ready, rop_write;
+	mem_word rop_writedata;
+	half_coord rop_address;
 	linear_coord rop_mask_addr;
 
 	gfx_rop rop
@@ -110,29 +112,25 @@ module gfx
 		.in_valid(frag_valid),
 		.mask_addr(rop_mask_addr),
 		.mask_assert(rop_mask_assert),
+		.*
+	);
 
-		.rop_write(),
-		.rop_address(),
-		.rop_writedata(),
-		.rop_waitrequest(0),
+	logic fb_readdatavalid, fb_waitrequest, rop_waitrequest;
+	mem_word fb_readdata;
 
+	gfx_mem mem
+	(
 		.*
 	);
 
-	logic scanout_read_tmp, vsync;
+	logic fb_read, vsync;
+	half_coord fb_address;
 	linear_coord scan_mask_addr;
 
 	gfx_scanout scanout
 	(
 		.mask(scan_mask),
 		.mask_addr(scan_mask_addr),
-
-		.fb_read(scanout_read_tmp),
-		.fb_address(),
-		.fb_readdata(),
-		.fb_waitrequest(0),
-		.fb_readdatavalid(scanout_read_tmp),
-
 		.*
 	);
 
diff --git a/rtl/gfx/gfx_defs.sv b/rtl/gfx/gfx_defs.sv
index 5af45a5..e743d75 100644
--- a/rtl/gfx/gfx_defs.sv
+++ b/rtl/gfx/gfx_defs.sv
@@ -158,6 +158,7 @@ typedef struct packed
 `define GFX_MEM_DATA_BITS      16 // No puedo hacer nada al respecto
 `define GFX_MEM_SUBWORD_BITS   ($clog2(`GFX_MEM_DATA_BITS / 8))
 `define GFX_MEM_ADDR_BITS      (`GFX_MEM_WORD_ADDR_BITS + `GFX_MEM_SUBWORD_BITS)
+`define GFX_MEM_FIFO_DEPTH     8 // Ajustar
 
 typedef logic[`GFX_MEM_DATA_BITS - 1:0]      mem_word;
 typedef logic[`GFX_MEM_ADDR_BITS - 1:0]      mem_addr;
diff --git a/rtl/gfx/gfx_mem.sv b/rtl/gfx/gfx_mem.sv
new file mode 100644
index 0000000..4b671be
--- /dev/null
+++ b/rtl/gfx/gfx_mem.sv
@@ -0,0 +1,70 @@
+`include "gfx/gfx_defs.sv"
+
+module gfx_mem
+(
+	input  logic      clk,
+	                  rst_n,
+
+	input  logic      mem_waitrequest,
+	                  mem_readdatavalid,
+	input  mem_word   mem_readdata,
+	output mem_addr   mem_address,
+	output logic      mem_read,
+	                  mem_write,
+	output mem_word   mem_writedata,
+
+	input  logic      rop_write,
+	input  mem_word   rop_writedata,
+	input  half_coord rop_address,
+	output logic      rop_waitrequest,
+
+	input  logic      fb_read,
+	input  half_coord fb_address,
+	output logic      fb_waitrequest,
+	                  fb_readdatavalid,
+	output mem_word   fb_readdata
+);
+
+	// Esto está mal, hay que reescribirlo totalmente
+
+	logic lock, lock_rop, select_rop, wait_state;
+
+	assign fb_readdata = mem_readdata;
+	assign fb_readdatavalid = mem_readdatavalid;
+
+	assign mem_writedata = rop_writedata;
+
+	assign wait_state = (mem_read || mem_write) && mem_waitrequest;
+
+	always_comb begin
+		select_rop = !fb_read;
+
+		if (lock)
+			select_rop = lock_rop;
+
+		mem_read = 0;
+		mem_write = 0;
+		fb_waitrequest = 1;
+		rop_waitrequest = 1;
+
+		if (select_rop) begin
+			mem_write = rop_write;
+			mem_address = {6'd0, rop_address};
+
+			rop_waitrequest = mem_waitrequest;
+		end else begin
+			mem_read = fb_read;
+			mem_address = {6'd0, fb_address};
+
+			fb_waitrequest = mem_waitrequest;
+		end
+	end
+
+	always_ff @(posedge clk or negedge rst_n)
+		lock <= !rst_n ? 0 : wait_state;
+
+	always_ff @(posedge clk)
+		if (wait_state)
+			lock_rop <= select_rop;
+
+endmodule