diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-10-23 10:52:18 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-10-23 10:52:18 -0600 |
| commit | de5debd2c30e9aad633b93c5bfec0780298a61d6 (patch) | |
| tree | fee3fa38ad4987502d9a982812a5cc2b0706e36b /rtl/core | |
| parent | aa7d075e6d9ba91d42265ff1b2530812dbc8129f (diff) | |
Fix bad decoding of second-operand immediates
Diffstat (limited to 'rtl/core')
| -rw-r--r-- | rtl/core/decode/snd.sv | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/rtl/core/decode/snd.sv b/rtl/core/decode/snd.sv index 78c5424..4c76f1c 100644 --- a/rtl/core/decode/snd.sv +++ b/rtl/core/decode/snd.sv @@ -43,10 +43,8 @@ module core_decode_snd put_carry = 0; sign_extend = 1'bx; - if(is_imm && !ror_if_imm) - shift_imm = 6'b0; - else if(is_imm && !ror_if_imm) - shift_imm = {1'b0, insn `FIELD_SND_ROR8, 1'b0}; + if(is_imm) + shift_imm = ror_if_imm ? {1'b0, insn `FIELD_SND_ROR8, 1'b0} : 6'b0; else begin shift_imm = {1'b0, insn `FIELD_SND_SHIFTIMM}; |