diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-09-27 15:16:07 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-09-27 15:16:07 -0600 |
| commit | ec7649eef16c7f9c3ca4b74a1cea95eb2f524b29 (patch) | |
| tree | 505a5fb945a4db50d7b4acd2fb92b45df6551220 /rtl/core/regs | |
| parent | 583a1ebaafe285c223afbfcc60bb68e6c10174ca (diff) | |
Fix branching bugs
Diffstat (limited to 'rtl/core/regs')
| -rw-r--r-- | rtl/core/regs/file.sv | 4 | ||||
| -rw-r--r-- | rtl/core/regs/regs.sv | 3 |
2 files changed, 4 insertions, 3 deletions
diff --git a/rtl/core/regs/file.sv b/rtl/core/regs/file.sv index e2bcc09..b2dd634 100644 --- a/rtl/core/regs/file.sv +++ b/rtl/core/regs/file.sv @@ -18,9 +18,9 @@ module core_reg_file assign rd_value = overwrite_hold ? wr_value_hold : q; - always @(posedge clk) begin + always @(negedge clk) begin if(wr_enable) begin - file[rd_index] <= wr_value; + file[wr_index] <= wr_value; wr_value_hold <= wr_value; end diff --git a/rtl/core/regs/regs.sv b/rtl/core/regs/regs.sv index 182b240..247c120 100644 --- a/rtl/core/regs/regs.sv +++ b/rtl/core/regs/regs.sv @@ -30,6 +30,7 @@ module core_regs assign pc_word = {pc_visible, 2'b00}; assign rd_value_a = rd_pc_a ? pc_word : file_rd_value_a; assign rd_value_b = rd_pc_b ? pc_word : file_rd_value_b; + assign file_wr_enable = wr_enable & ~wr_pc; assign branch = wr_enable & wr_pc; core_reg_file a @@ -44,7 +45,7 @@ module core_regs ( .rd_index(rd_index_b), .rd_value(file_rd_value_b), - .wr_enable(wr_enable & ~wr_pc), + .wr_enable(file_wr_enable), .* ); |
