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authorAlejandro Soto <alejandro@34project.org>2022-12-11 23:54:38 -0600
committerAlejandro Soto <alejandro@34project.org>2022-12-16 16:29:10 -0600
commit79e05aa7f0ccce6eb26248ddef3e928727857a9c (patch)
tree8c67d6532234dac0eace7f005638efc8441105a5 /rtl/core/fetch/prefetch.sv
parent0284628a47d5b4797c89f6846b9efee3f1243b94 (diff)
Implement prefetch aborts
Diffstat (limited to 'rtl/core/fetch/prefetch.sv')
-rw-r--r--rtl/core/fetch/prefetch.sv33
1 files changed, 24 insertions, 9 deletions
diff --git a/rtl/core/fetch/prefetch.sv b/rtl/core/fetch/prefetch.sv
index 1b5a4c5..719ad95 100644
--- a/rtl/core/fetch/prefetch.sv
+++ b/rtl/core/fetch/prefetch.sv
@@ -7,6 +7,7 @@ module core_prefetch
rst_n,
stall,
flush,
+ fault,
fetched,
input word fetch_data,
input ptr head,
@@ -14,34 +15,43 @@ module core_prefetch
output word insn,
output ptr insn_pc,
output logic fetch,
- nop
+ nop,
+ insn_abort
);
localparam SIZE = (1 << ORDER) - 1;
ptr next_pc;
+ logic faults[SIZE];
logic[31:0] prefetch[SIZE];
logic[ORDER - 1:0] valid;
assign nop = flush ? 1 : ~|valid;
assign insn = flush ? `NOP : prefetch[0];
- assign next_pc = ~stall & |valid ? insn_pc + 1 : insn_pc;
assign fetch = !stall || ~&valid;
+ assign next_pc = ~stall & |valid ? insn_pc + 1 : insn_pc;
+ assign insn_abort = flush ? 0 : faults[0];
always_ff @(posedge clk or negedge rst_n)
if(!rst_n) begin
valid <= 0;
insn_pc <= 0;
+
+ faults[SIZE - 1] <= 0;
prefetch[SIZE - 1] <= `NOP;
end else begin
insn_pc <= flush ? head : next_pc;
- if(flush)
+ if(flush) begin
+ faults[SIZE - 1] <= 0;
prefetch[SIZE - 1] <= `NOP;
- else if(fetched && valid == SIZE - 1 + {{(ORDER - 1){1'b0}}, !stall})
+ end else if(fetched && valid == SIZE - 1 + {{(ORDER - 1){1'b0}}, !stall}) begin
+ faults[SIZE - 1] <= fault;
prefetch[SIZE - 1] <= fetch_data;
- else if(!stall)
+ end else if(!stall) begin
+ faults[SIZE - 1] <= 0;
prefetch[SIZE - 1] <= `NOP;
+ end
if(flush)
valid <= 0;
@@ -55,14 +65,19 @@ module core_prefetch
generate
for(i = 0; i < SIZE - 1; ++i) begin: prefetch_slots
always_ff @(posedge clk or negedge rst_n)
- if(!rst_n)
+ if(!rst_n) begin
+ faults[i] <= 0;
prefetch[i] <= `NOP;
- else if(flush)
+ end else if(flush) begin
+ faults[i] <= 0;
prefetch[i] <= `NOP;
- else if(fetched & (~(|i | |valid) | (valid == i + {{(ORDER - 1){1'b0}}, ~stall})))
+ end else if(fetched & (~(|i | |valid) | (valid == i + {{(ORDER - 1){1'b0}}, ~stall}))) begin
+ faults[i] <= fault;
prefetch[i] <= fetch_data;
- else if(~stall)
+ end else if(~stall) begin
+ faults[i] <= faults[i + 1];
prefetch[i] <= prefetch[i + 1];
+ end
end
endgenerate