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authorAlejandro Soto <alejandro@34project.org>2022-10-23 23:34:34 -0600
committerAlejandro Soto <alejandro@34project.org>2022-10-23 23:34:34 -0600
commit642f1480854fa60c71dd06cb57c29fee0b3504e9 (patch)
tree2f6ac9ca1c4643f77ed2a80d4531b90bdc481500 /rtl/core/decode
parent1e17c6994897bc2edbde3b52db6a1e39d9a20f03 (diff)
Move signal `uses_rn` to struct data_decode
Diffstat (limited to 'rtl/core/decode')
-rw-r--r--rtl/core/decode/data.sv6
-rw-r--r--rtl/core/decode/decode.sv8
2 files changed, 6 insertions, 8 deletions
diff --git a/rtl/core/decode/data.sv b/rtl/core/decode/data.sv
index 103fb14..1bd7ef9 100644
--- a/rtl/core/decode/data.sv
+++ b/rtl/core/decode/data.sv
@@ -10,16 +10,18 @@ module core_decode_data
snd_shift_by_reg_if_reg,
writeback,
update_flags,
- restore_spsr,
- uses_rn
+ restore_spsr
);
alu_op op;
reg_num rn, rd;
+ logic uses_rn;
assign decode.op = op;
assign decode.rn = rn;
assign decode.rd = rd;
+ assign decode.uses_rn = uses_rn;
+
assign rn = insn `FIELD_DATA_RN;
assign rd = insn `FIELD_DATA_RD;
assign op = insn `FIELD_DATA_OPCODE;
diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv
index cd3ee53..da244c1 100644
--- a/rtl/core/decode/decode.sv
+++ b/rtl/core/decode/decode.sv
@@ -11,7 +11,6 @@ module core_decode
undefined,
writeback,
update_flags,
- uses_rn,
output branch_decode branch_ctrl,
output snd_decode snd_ctrl,
output data_decode data_ctrl,
@@ -56,7 +55,7 @@ module core_decode
data_decode data;
logic data_writeback, data_update_flags, data_restore_spsr,
- data_is_imm, data_shift_by_reg_if_reg, data_uses_rn;
+ data_is_imm, data_shift_by_reg_if_reg;
core_decode_data group_data
(
@@ -66,7 +65,6 @@ module core_decode
.restore_spsr(data_restore_spsr),
.snd_is_imm(data_is_imm),
.snd_shift_by_reg_if_reg(data_shift_by_reg_if_reg),
- .uses_rn(data_uses_rn),
.*
);
@@ -117,11 +115,11 @@ module core_decode
branch = 0;
writeback = 0;
update_flags = 0;
- uses_rn = 1;
execute = cond_execute;
undefined = cond_undefined;
data_ctrl = {($bits(data_ctrl)){1'bx}};
+ data_ctrl.uses_rn = 1;
snd_ctrl = {$bits(snd_ctrl){1'bx}};
snd_ctrl.shr = 0;
@@ -152,7 +150,6 @@ module core_decode
end
`GROUP_ALU: begin
- uses_rn = data_uses_rn;
snd_is_imm = data_is_imm;
snd_ror_if_imm = 1;
snd_shift_by_reg_if_reg = data_shift_by_reg_if_reg;
@@ -227,7 +224,6 @@ module core_decode
execute = 0;
branch = 1'bx;
- uses_rn = 1'bx;
writeback = 1'bx;
conditional = 1'bx;
update_flags = 1'bx;