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| author | Alejandro Soto <alejandro@34project.org> | 2022-09-26 10:28:18 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-09-26 10:28:18 -0600 |
| commit | dec51abad98cfdee3e0262ff667a53f510c33360 (patch) | |
| tree | e090e7fab51fe0a57e54f0ee215a9eb71fbbef31 /rtl/core/decode | |
| parent | af2f49f863deaeb6dc905bbb15701b50bc139873 (diff) | |
Fix shifter addressing modes
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/decode/data.sv | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/rtl/core/decode/data.sv b/rtl/core/decode/data.sv index 89b9967..4dc51a4 100644 --- a/rtl/core/decode/data.sv +++ b/rtl/core/decode/data.sv @@ -30,6 +30,8 @@ module core_decode_data assign decode.ror = ror; assign decode.put_carry = put_carry; assign decode.sign_extend = sign_extend; + assign decode.imm = imm; + assign decode.shift_imm = shift_imm; assign rn = insn `FIELD_DATA_RN; assign rd = insn `FIELD_DATA_RD; |