diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-10-17 01:25:42 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-10-17 01:25:42 -0600 |
| commit | 1ca30fb3de058b9498f6a6bbc646b79978ece846 (patch) | |
| tree | 9336889b1556563e3b8f6c328ae185aaa83895cb /rtl/core/decode | |
| parent | b328dee91da704474509054043740128e5969c8b (diff) | |
Break false dependency on r0 for MOV/MVN
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/decode/data.sv | 11 | ||||
| -rw-r--r-- | rtl/core/decode/decode.sv | 10 |
2 files changed, 17 insertions, 4 deletions
diff --git a/rtl/core/decode/data.sv b/rtl/core/decode/data.sv index cb21f5e..103fb14 100644 --- a/rtl/core/decode/data.sv +++ b/rtl/core/decode/data.sv @@ -10,7 +10,8 @@ module core_decode_data snd_shift_by_reg_if_reg, writeback, update_flags, - restore_spsr + restore_spsr, + uses_rn ); alu_op op; @@ -35,6 +36,14 @@ module core_decode_data writeback = 1; endcase + unique case(op) + `ALU_MOV, `ALU_MVN: + uses_rn = 0; + + default: + uses_rn = 1; + endcase + update_flags = insn `FIELD_DATA_S; restore_spsr = (rd == `R15) & update_flags; diff --git a/rtl/core/decode/decode.sv b/rtl/core/decode/decode.sv index 321e972..b2d9518 100644 --- a/rtl/core/decode/decode.sv +++ b/rtl/core/decode/decode.sv @@ -11,6 +11,7 @@ module core_decode undefined, writeback, update_flags, + uses_rn, branch, output ptr branch_offset, output snd_decode snd_ctrl, @@ -54,7 +55,7 @@ module core_decode data_decode data; logic data_writeback, data_update_flags, data_restore_spsr, - data_is_imm, data_shift_by_reg_if_reg; + data_is_imm, data_shift_by_reg_if_reg, data_uses_rn; core_decode_data group_data ( @@ -64,6 +65,7 @@ module core_decode .restore_spsr(data_restore_spsr), .snd_is_imm(data_is_imm), .snd_shift_by_reg_if_reg(data_shift_by_reg_if_reg), + .uses_rn(data_uses_rn), .* ); @@ -111,11 +113,12 @@ module core_decode ); always_comb begin - undefined = cond_undefined; - branch = 0; writeback = 0; update_flags = 0; + uses_rn = 1; + undefined = cond_undefined; + data_ctrl = {($bits(data_ctrl)){1'bx}}; snd_ctrl = {$bits(snd_ctrl){1'bx}}; @@ -145,6 +148,7 @@ module core_decode end `GROUP_ALU: begin + uses_rn = data_uses_rn; snd_is_imm = data_is_imm; snd_ror_if_imm = 1; snd_shift_by_reg_if_reg = data_shift_by_reg_if_reg; |
