diff options
| author | Alejandro Soto <alejandro@34project.org> | 2022-11-10 10:11:33 -0600 |
|---|---|---|
| committer | Alejandro Soto <alejandro@34project.org> | 2022-11-10 10:11:33 -0600 |
| commit | acca3eb31a051f335c51306786bb972c21634998 (patch) | |
| tree | 9f8fc3da1a8494e88c5043735862e56c54356bc0 /rtl/core/decode/mux.sv | |
| parent | 0f89db514bd174def590645c30a7bd358ea6be93 (diff) | |
Fix reset glitches
Diffstat (limited to '')
| -rw-r--r-- | rtl/core/decode/mux.sv | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/rtl/core/decode/mux.sv b/rtl/core/decode/mux.sv index ebcc098..594b7f0 100644 --- a/rtl/core/decode/mux.sv +++ b/rtl/core/decode/mux.sv @@ -94,13 +94,15 @@ module core_decode_mux snd_ror_if_imm = 1'bx; snd_shift_by_reg_if_reg = 1'bx; - ldst_addr = {($bits(ldst_addr)){1'bx}}; dec_ldst = {($bits(dec_ldst)){1'bx}}; + ldst_addr = {($bits(ldst_addr)){1'bx}}; // El orden de los casos es importante, NO CAMBIAR priority casez(insn `FIELD_OP) `GROUP_B: begin branch = 1; + dec_data.uses_rn = branch_link; + if(branch_link) begin dec_data.op = `ALU_SUB; dec_data.rd = `R14; @@ -186,14 +188,16 @@ module core_decode_mux end `INSN_MRS: begin - dec_snd.is_imm = 0; - dec_snd.r = mrs_rd; + dec_data.rd = mrs_rd; + dec_data.uses_rn = 0; writeback = 1; conditional = 1; end `GROUP_MSR: begin + dec_data.uses_rn = 0; + snd_is_imm = msr_is_imm; snd_ror_if_imm = 1; snd_shift_by_reg_if_reg = 0; |
